Novel beam lead integrated circuit structure and method for making the same including automatic registration of beam leads with corresponding dielectric substrate leads

Claim 2

A beam-lead integrated circuit chip structure comprising: a semiconductor chip substrate having a surface from which the active and passive devices in the circuit extend into the substrate, a first layer of electrically insulative material over said surface, a metallic interconnector pattern formed on said layer in a first plane, said pattern being selectively connected to said devices by device contacts extending through said layer, a second layer of electrically insulative material over said interconnector pattern, a plurality of chip contacts extending through said second layer into contact with said interconnector pattern, a plurality of solder mounds having a lower melting point than beam-leads extending from the surface of said chip structure to a level beyond said second plane, and a plurality of peripheral cantilevered metallic beam-leads, disposed in a second plane, respectively in contact with said chip contacts and extending beyond the periphery of said chip.

Claim 3

The beam-lead chip structure of claim 1 wherein said pluarlity of solder mounds are electrically insulated from said devices and said interconnector pattern.

Claim 4

The beam-lead chip structure of claim 1 wherein each of said solder mounds is respectively supported on a support structure comprising a metallic land formed on said first insulative layer, a mound contact spaced from but of the same composition as said chip contact extending through said second insulative layer to said metallic land, and a metallic layer of the same metal and in the same plane as said beam-leads on said mound contact and supporting said solder mound.

Claim 5

The beam-lead chip structure of claim 1 wherein said beam-leads are spaced from said second layer.

Claim 6

A beam-lead integrated circuit chip assembly comprising a dielectric substrate, a beam-lead integrated circuit chip structurE mounted on said substrate, which chip structure comprises a semiconductor chip substrate having a surface from which the active and passive devices in the circuit extend into the substrate, a first layer of electrically insulative material over said surface, a metallic interconnector pattern formed on said layer in a first plane, said pattern being selectively connected to said devices by device contacts extending through said layer, a second layer of electrically insulative material over said interconnector pattern, a plurality of chip contacts extending through said second layer into contact with said interconnector pattern, a plurality of peripheral cantilevered metallic beam-leads, disposed in a second plane, respectively in contact with said chip contacts and extending beyond the periphery of said chip and a plurality of solder mounds having a lower melting point than said beam-leads extending from the surface of said chip structure, said dielectric substrate comprising a metallic land pattern formed on a surface of said substrate, a plurality of land leads extending from said conductive land pattern on said dielectric substrate in registration with a plurality of said beam-leads which are respectively mounted on said land leads, and a plurality of land pads on said dielectric substrate respectively supporting said plurality of solder mounds.

Claim 7

A beam-lead integrated circuit chip assembly comprising a dielectric substrate, a beam-lead integrated circuit chip structurE mounted on said substrate, which chip structure comprises a semiconductor chip substrate having a surface from which the active and passive devices in the circuit extend into the substrate, a first layer of electrically insulative material over said surface, a metallic interconnector pattern formed on said layer in a first plane, said pattern being selectively connected to said devices by device contacts extending through said layer, a second layer of electrically insulative material over said interconnector pattern, a plurality of chip contacts extending through said second layer into contact with said interconnector pattern, a plurality of peripheral cantilevered metallic beam-leads, disposed in a second plane, respectively in contact with said chip contacts and extending beyond the periphery of said chip and a plurality of solder mounds having a lower melting point than said beam-leads extending from the surface of said chip structure, said dielectric substrate comprising a metallic land pattern formed on a surface of said substrate, a plurality of land leads extending from said conductive land pattern on said dielectric substrate in registration with a plurality of said beam-leads which are respectively mounted on said land leads, and a plurality of land pads on said dielectric substrate respectively supporting said plurality of solder mounds.

Claim 8

The assembly structure of claim 5 wherein said plurality of solder mounds are electrically insulated from the devices in said interconnector pattern.

Claim 9

The assembly structure of claim 6 wherein said plurality of land pads are electrically isolated from said land pattern.

Claim 10

The assembly structure of claim 5 wherein said beam-leads are spaced from said second insulative layer.

Claim 11

The assembly structure of claim 6 wherein each of the solder mounds in said chip is respectively supported on a support structure comprising a metallic land formed on said first insulative layer, a mound contact spaced from but of the same composition as said chip contact extending through said second insulative layer, and a metallic layer of the same metal and in the same plane as said beam-leads on said mound contact and supporting said solder mound.

Claim 12

The beam-lead chip structure of claim 1 wherein said plurality of solder mounds comprises at least three solder mounds.

Claim 13

The beam-lead integrated circuit assembly of claim 5 wherein said plurality of solder mounds comprises at least three solder mounds.

Claim 14

A beam-lead integrated circuit chip structure comprising a semiconductor chip substrate having a passivated planar surface from which the active and passive devices in the circuit extend into the substrate, a plurality of peripheral beam-leads interconnected with the circuit devices extending beyond the periphery of the chip, and a plurality of solder mounds having a lower melting point than said beam-leads extending from said surface to a plane further from said surface than the plane of said beam-leads.

Claim 15

A beam-lead integrated circuit chip structure comprising a semiconductor chip substrate having a passivated planar surface from which the active and passive devices in the circuit extend into the substrate, a plurality of peripheral beam-leads interconnected with the circuit devices extending beyond the periphery of the chip, and a plurality of solder mounds having a lower melting point than said beam-leads extending from said surface to a plane further from said surface than the plane of said beam-leads.

Claim 16

The beam-lead integrated circuit structure of claim 12 wherein said solder mounds are electrically insulated from said chip substrate and beam-leads.

Claim 17

The beam-lead integrated circuit chip structure of claim 12 wherein said plurality of solder mounds comprises at least three solder mounds.

Claim 18

A beam-lead integrated circuit chip assembly comprising a dielectric substrate, a beam-lead integrated circuit chip structure mounted on said substrate, which chip structure comprises a semiconductor chip substrate having a passivated planar surface from which the active and passive devices in the circuit extend into the substrate, a plurality of peripheral beam-leads interconnected with the circuit devices extending beyond the periphery of the chip, and a plurality of solder mounds having a lower melting point than said beam-leads extending from said surface to a plane further from said surface than the planE of said beam-leads, said dielectric substrate comprising a metallic land pattern formed on a surface of said substrate, a plurality of land leads extending from said conductive land pattern on said substrate in registration with a plurality of said beam-leads which are respectively mounted on said land leads, and a plurality of land pads on said dielectric substrate respectively supporting said plurality of solder mounds.

Claim 19

A beam-lead integrated circuit chip assembly comprising a dielectric substrate, a beam-lead integrated circuit chip structure mounted on said substrate, which chip structure comprises a semiconductor chip substrate having a passivated planar surface from which the active and passive devices in the circuit extend into the substrate, a plurality of peripheral beam-leads interconnected with the circuit devices extending beyond the periphery of the chip, and a plurality of solder mounds having a lower melting point than said beam-leads extending from said surface to a plane further from said surface than the planE of said beam-leads, said dielectric substrate comprising a metallic land pattern formed on a surface of said substrate, a plurality of land leads extending from said conductive land pattern on said substrate in registration with a plurality of said beam-leads which are respectively mounted on said land leads, and a plurality of land pads on said dielectric substrate respectively supporting said plurality of solder mounds.

Claim 20

The assembly structure of claim 15 wherein said plurality of solder mounds are electrically insulated from said devices and beam-leads, and said plurality of land pads are electrically isolated from said land pattern.