Abstract A gate generator including first and second JK flip-flops each having inhibit, J, K, and drive inputs. The inhibit inputs are also commonly known as the set and reset inputs. It is common to refer to the outputs of the flip-flops as the Q and Q outputs. A D.C. source of potential is provided from which a resistor is connected to each J input. Both K inputs are connected to ground. A source of pulses is also provided. Both clock inputs are connected from the pulse source. A NAND gate having first and second inputs and an output has the Q output of the first flipflop connected to the NAND gate first input. The Q output of the second flip-flop is connected to the NAND gate second input. The second flip-flop Q output is connected to the reset input and the first flip-flop. Manually operable means are then provided for momentarily changing the potential at the second flip-flop reset input to cause the Q output of the second flip-flop to be high.
A gate generator comprising: first and second JK flip-flops each having inhibit, J, K and drive inputs, and Q and Q outputs; a D.C. source of potential; a resistor connected from said D.C. source to each J input, both K inputs being connected to ground; a source of pulses, both drive inputs being connected from said pulse source, a NAND gate having first and second inputs and an output, said Q output of said first flip-flop being connected to said NAND gate first input, said Q output of said second flipflop being connected to said NAND gate second input, said second flip-flop Q output being connected to the inhibit input of said first flip-flop; and manually operabLe means for momentarily changing the potential at said second flip-flop inhibit input to cause said Q output of said second flip-flop to be high.
Claim 2
Dependent Claim
141 words
A gate generator comprising: first and second JK flip-flops each having inhibit, J, K and drive inputs, and Q and Q outputs; a D.C. source of potential; a resistor connected from said D.C. source to each J input, both K inputs being connected to ground; a source of pulses, both drive inputs being connected from said pulse source, a NAND gate having first and second inputs and an output, said Q output of said first flip-flop being connected to said NAND gate first input, said Q output of said second flipflop being connected to said NAND gate second input, said second flip-flop Q output being connected to the inhibit input of said first flip-flop; and manually operabLe means for momentarily changing the potential at said second flip-flop inhibit input to cause said Q output of said second flip-flop to be high.