Electrodes for amorphous semiconductor switch devices and method of making the same

Claim 2

A SWITCH DEVICE COMPRISING IN COMBINATION, A SUBSTRATE, A GLASSY FILM OF AMORPHOUS SEMICONDUCTOR SWITCH MATERIAL ON SAID SUBSTRATE AND FORMING THE ACTIVE SWITCH MATERIAL OF THE DEVICE, AND A PAIR OF SPACED APART ELECTRODES IN CONTACT WITH SAID FILM OF AMORPHOUS SEMICONDUCTOR MATERIAL TO FORM THE ELECTRODES OF THE SWITCH DEVICE, THE AMORPHOUS SEMICONDUCTOR MATERIAL AND ELECTRODES CONTACTING ONE ANOTHER ALONG A SMOOTH INTERFACE, AT LEAST ONE OF SAID ELECTRODES BEING A SINGLE CRYSTAL OF A METAL SILICIDE MATERIAL WHICH IS NONREACTIVE WITH AND IS OTHERWISE COMPATIBLE WITH SAID AMORPHOUS SEMICONDUCTOR MATERIAL, SAID AMORPHOUS SEMICONDUCTOR SWITCH MATERIAL BEING OF RELATIVELY HIGH RESISTANCE, AND AT LEAST ONE CURRENT CONDUCTING PATH OF RELATIVELY LOW RESISTANCE BEING ESTABLISHED BETWEEN THE ELECTRODES IN RESPONSE TO THE APPLICATION OF A VOLTAGE TO THE ELECTRODES ABOVE A THRESHOLD VOLTAGE VALUE.

Claim 3

A switch device as defined in claim 1 wherein said at least one conducting path of relatively low resistance of the semiconductor material remains in a relatively low resistance conducting state even though the current therethrough decreases to zero, and realters from said at least one conducting path of relatively low resistance to a relatively high resistance blocking state in response to a reset current pulse applied to the electrodes.

Claim 4

The switch device of claim 1 wherein said at least one electrode comprises a single metal silicide crystal layer grown on said substrate.

Claim 5

The switch device of claim 3 wherein said substrate is a silicon chip and said single crystal layer is a platinum or noble metal silicide.

Claim 6

The switch device of claim 1 wherein said at least one electrode comprises a single crystal epitaxial metal silicide layer on said substrate, the epitaxial layer comprising a deposited metal diffused into the single crystal semiconductor substrate and annealed to increase the thickness thereof.

Claim 7

The switch device of claim 1 wherein said substrate is a silicon chip and said single crystal layer is palladium silicide.

Claim 8

In an integrated circuit comprising a semiconductor substrate and at least one doped current carrying device-forming region exposed through an associated aperture in an insulating surface on the substrate, and a film of an ohmic contact electrode-forming material in said aperture and making electrical contact with the current carrying devices formed by the doped region in said substrate, the improvement wherein there is deposited directly upon said ohmic contact-forming deposit an amorphous semiconductor switch-forming material upon which is also deposited an ohmic contact electrode-forming material having a smooth face contacting the same, said deposit of amorphous semiconductor material being of a relatively high resistance and including means for establishing at least one current conducting path of relatively low resistance between the electrodes thereof in response to the application of the voltage to the electrodes above a threshold voltage value, said ohmic contact electrode in said aperture of said substrate being a single crystal of a metal silicide material which has a smooth face contacting a smooth face of said amorphous semiconductor material.

Claim 9

In an integrated circuit comprising a semiconductor substrate and at least one doped current carrying device-forming region exposed through an associated aperture in an insulating surface on the substrate, and a film of an ohmic contact electrode-forming material in said aperture and making electrical contact with the current carrying devices formed by the doped region in said substrate, the improvement wherein there is deposited directly upon said ohmic contact-forming deposit an amorphous semiconductor switch-forming material upon which is also deposited an ohmic contact electrode-forming material having a smooth face contacting the same, said deposit of amorphous semiconductor material being of a relatively high resistance and including means for establishing at least one current conducting path of relatively low resistance between the electrodes thereof in response to the application of the voltage to the electrodes above a threshold voltage value, said ohmic contact electrode in said aperture of said substrate being a single crystal of a metal silicide material which has a smooth face contacting a smooth face of said amorphous semiconductor material.

Claim 10

The switch device of claim 7 wherein said electrode comprises a single crystal metal silicide epitaxial layer on said substrate which is a single crystal semiconductor substrate, the epitaxial layer comprising a deposited metal diffused into the single crystal semiconductor substrate and annealed to increase the thickness thereof.

Claim 11

The switch device of claim 7 wherein said substrate is a silicon chip and said single crystal layer is a platinum or noble metal silicide.

Claim 12

The integrated circuit of claim 7 wherein said substrate is doped silicon, said single crystal deposit of ohmic contact-forming material in each of said substrate apertures is a single crystal of palladium silicide formed as an epitaxial layer of the associated doped region of the substrate, and said amorphous semiconductor material is a chalcogenide glass having the general formula: Ge.sub.A Te.sub.B X.sub.C Y.sub.D