Patent US3876933A successfully refreshed from Google Patents.
US3876933A
Expired / Lapsed
US
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Resistance measuring instrument with linearized digital readout
Assignee: TDK Micronas GmbH
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Filing: 1973-12-28
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Granted: 1975-04-08
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Expires: 1993-12-28
Abstract
Abstract A device for measurement of electrical resistance in low or megohm ranges. In low scale operation the unknown resistance is subjected to a constant current source of known value and a digital voltmeter calibrated in resistance units provides the reading. The voltmeter utilizes a double ramp arrangement which integrates the voltage across the unknown resistance for a predetermined count and then integrates back against a reference to the initial level thereby providing a countable measure of resistance value. In the megohm ranges, the unknown is subjected to a regulated 500 volt test voltage and the current through a series sensing resistor measured by a digital voltmeter also calibrated in resistance units. The double ramp integrator operation is reversed, i.e., it integrates against the reference first and back to the initial level at a slope determined by the unknown resistance. The result is that a hyperbolic relationship exists which linearizes the measurement since it is opposite to the hyperbolic relationship inherent of the basic measurement technique.
Inventors
- 👤 Lawrence Herrington
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 20:28
CPC Classifications
G; G01; G01R; G01R27/00; G01R27/02; G01R19/00; G01R19/25; G01R19/255; H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/52
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
193 words
In an electrical resistance measuring instrument having a digital display calibrated in resistance units, means for applying a test voltage across an unknown resistance to be measured, a feedback operational amplifier for producing a voltage signal proportional to the current through said unknown resistance, means for measuring the voltage signal and for producing and supplying to said display, a digital code which is a function of said voltage signal, the combination comprising: a double ramp integrating circuit; a source of reference voltage of a predetermined magnitude; digital timing means including a clock pulse generator and counting means controlled thereby; and control means associated with said timing means and said integrating circuit for integrating said reference voltage in a first sense for a first period predetermined by said timing means and for integrating said voltage signal in a second sense which is the reverse of said first sense for a subsequent second period ending substantially at the time the output of said integrating circuit returns to its initial condition extant before said first integration, said control means also being operative to provide a digital output signal representative of the duration of said second integration.
Claim 2
Dependent Claim
193 words
In an electrical resistance measuring instrument having a digital display calibrated in resistance units, means for applying a test voltage across an unknown resistance to be measured, a feedback operational amplifier for producing a voltage signal proportional to the current through said unknown resistance, means for measuring the voltage signal and for producing and supplying to said display, a digital code which is a function of said voltage signal, the combination comprising: a double ramp integrating circuit; a source of reference voltage of a predetermined magnitude; digital timing means including a clock pulse generator and counting means controlled thereby; and control means associated with said timing means and said integrating circuit for integrating said reference voltage in a first sense for a first period predetermined by said timing means and for integrating said voltage signal in a second sense which is the reverse of said first sense for a subsequent second period ending substantially at the time the output of said integrating circuit returns to its initial condition extant before said first integration, said control means also being operative to provide a digital output signal representative of the duration of said second integration.
Claim 3
Dependent Claim
15 words
Apparatus according to claim 1 including a digital display responsive to said digital output signal.
Claim 4
Dependent Claim
47 words
Apparatus according to claim 2 in which said control means includes a low frequency conversion rate pulser connected to cyclically initiate the operation of circuits including said digital timing means, said integrating circuit and said display to facilitate a series of measurement cycles at said low frequency.
Claim 5
Dependent Claim
65 words
Apparatus according to claim 3 in which said timing means includes a digital count register connected to count the pulses of said clock generator for a predetermined number of counts following each pulse from said conversion rate pulser, to initiate said integrator second period of integration, and to count anew from said initiation of said second period of integration to provide said digital output signal.
Claim 6
Dependent Claim
36 words
Apparatus according to claim 4 in which said display comprises a plurality of seven bar LED numerical display units, one of said units being provided for each digit of the maximum resistance value to be measured.
Claim 7
Dependent Claim
49 words
Apparatus according to claim 4 in which said control means comprises a solid state switch connected to cause said integrator to reach a quiescent condition and to hold said integrator in said quiescent condition at said initial condition when open and to permit said integration to start when closed.
Claim 8
Dependent Claim
36 words
Apparatus according to claim 4 in which said predetermined number of counts following each pulse from said conversion rate pulser to said reset of said integrator is the maximum allowed count of said digital count register.
Claim 9
Dependent Claim
57 words
Apparatus according to claim 7 in which said control means comprises means for recognizing the point at which said integrating circuit return to said initial condition at the end of said second integration period, said means being operative to stop the counting of said register at that time, and including means for enabling said LED display thereafter.
Claim 10
Dependent Claim
35 words
Apparatus according to claim 8 including means for generating said reference voltage in operative relationship with said test voltage whereby small variations in said test voltage are reflected as compensatory variations in said reference voltage.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-04-07 | 1978-10-07 | 1979-04-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-04-07 | 1982-10-07 | 1983-04-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-04-07 | 1986-10-07 | 1987-04-08 | $7700.00 | Window Closed / Lapsed |