Method of gettering impurities in semiconductor devices introducing stress centers and devices resulting thereof

Claim 1

A METHOD OF GETTERING IMPURITIES, TYPICALLY METALLIC ATOMS, IN A MONOCRYSTALLINE SILICON DEVICE FROM THE ACTIVE DEVICE VOLUME TO AVOID FORMATION OF PIPES WHICH RESULT IN SHORTS BETWEEN TWO REGIONS OF IDENTICAL CONDUCTIVITY AND OF A FIRST TYPE OF CONDUCTIVITY OPPOSITE TO SAID FIRST TYPE AND/OR PRE TYPE OF CONDUCTIVITY OPPOSITE TO SAID FIRST TYPE AND/OR PRECIPITATES OR PRECIPITATES WHICH RESULT IN SOFT JUNCTIONS, CHARACTERIZED IN THAT IT COMPRISES THE STEPS OF INTRODUCING SEMICONDUCTOR DOPANTS INTO A MONOCRYSTALLINE SILICON BODY TO FORM THE BASE REGION, THE EMITTER REGION, AND COLLECTOR CONTACT REGION OF A TRANSISTOR, PROVIDING A MASKING LAYER ON THE SURFACE OF SAID SILICON BODY, HAVING AT LEAST CONTACT OPENINGS EXPOSING EMITTER AND COLLECTOR CONTACT REGIONS OF THE TRANSISTOR, INTRODUCING SUBSTITUTIONAL IMPURITY ATOMS INTO THE EXPOSED REGIONS OF THE TRANSISTOR UNDER CONDITIONS THAT PRODUCE SHALLOW IMPURITIES REGIONS OF HIGH IMPURITY CONCENTRATIONS, SAID SUBSTITUTIONAL IMPURITY ATOMS HAVING A SOLID SOLUBILITY LIMIT IN SILICON THAT IS LESS THAN THE IMPURITY CONCENTRATION OF AT LEAST THE EMITTER CONCENTRATION, SAID CONCENTRATIONS AT OR NEAR THE SOLUBILITY LIMIT OF THE SUBSTITUTIONAL IMPURITY IN THE SILICON MATERIAL, SAID IMPURITY REGIONS FORMING HIGHLY STRESSED VOLUMES, HEATING THE SILICON BODY TO CAUSE GETTERING OF SAID METALLIC ATOMS BY SAID HIGHLY STRESSED VOLUMES.

Claim 2

A METHOD OF GETTERING IMPURITIES, TYPICALLY METALLIC ATOMS, IN A MONOCRYSTALLINE SILICON DEVICE FROM THE ACTIVE DEVICE VOLUME TO AVOID FORMATION OF PIPES WHICH RESULT IN SHORTS BETWEEN TWO REGIONS OF IDENTICAL CONDUCTIVITY AND OF A FIRST TYPE OF CONDUCTIVITY OPPOSITE TO SAID FIRST TYPE AND/OR PRE TYPE OF CONDUCTIVITY OPPOSITE TO SAID FIRST TYPE AND/OR PRECIPITATES OR PRECIPITATES WHICH RESULT IN SOFT JUNCTIONS, CHARACTERIZED IN THAT IT COMPRISES THE STEPS OF INTRODUCING SEMICONDUCTOR DOPANTS INTO A MONOCRYSTALLINE SILICON BODY TO FORM THE BASE REGION, THE EMITTER REGION, AND COLLECTOR CONTACT REGION OF A TRANSISTOR, PROVIDING A MASKING LAYER ON THE SURFACE OF SAID SILICON BODY, HAVING AT LEAST CONTACT OPENINGS EXPOSING EMITTER AND COLLECTOR CONTACT REGIONS OF THE TRANSISTOR, INTRODUCING SUBSTITUTIONAL IMPURITY ATOMS INTO THE EXPOSED REGIONS OF THE TRANSISTOR UNDER CONDITIONS THAT PRODUCE SHALLOW IMPURITIES REGIONS OF HIGH IMPURITY CONCENTRATIONS, SAID SUBSTITUTIONAL IMPURITY ATOMS HAVING A SOLID SOLUBILITY LIMIT IN SILICON THAT IS LESS THAN THE IMPURITY CONCENTRATION OF AT LEAST THE EMITTER CONCENTRATION, SAID CONCENTRATIONS AT OR NEAR THE SOLUBILITY LIMIT OF THE SUBSTITUTIONAL IMPURITY IN THE SILICON MATERIAL, SAID IMPURITY REGIONS FORMING HIGHLY STRESSED VOLUMES, HEATING THE SILICON BODY TO CAUSE GETTERING OF SAID METALLIC ATOMS BY SAID HIGHLY STRESSED VOLUMES.