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US3868656A Expired / Lapsed US ⏱️ 0.0 years remaining

Regenerating circuit for binary signals in the form of a keyed flip-flop

Assignee: Siemens AG
•
Filing: 1973-12-19
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Granted: 1975-02-25
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Expires: 1993-12-19
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Abstract

Abstract A regenerating circuit for binary signals in the form of a keyed flip-flop with one labile and two stable points has at least two inverting amplifier stages, featuring feedback, in particular for the stored signals and for the read-out signals of integrated single transistor storage elements which form a storage field. The storage elements of the storage field are connected by way of a digit line to the regenerating circuit and the inverting amplifier stages may be adjusted into the region of the labile point of the circuit by means of a feedback device by way of an inverter stage or an odd number of inverter stages.

Inventors

  • 👤 Karl-Ulrich Stein
  • 👤 Karl Goser

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 05:09
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356069; H03K3/356078; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; G11C11/4063; G11C11/407; G11C11/409; G11C11/4091; H03K3/356086; H03K3/356095

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 113 words
In a regenerating circuit for binary signals, in the form of a keyed flip-flop having one labile and two stable points, and with at least two inverting amplifier stages each including a switching transistor and a load transistor, in particular for stored signals and for the read-out of integrated single transistor storage elements which form a storage field in which the storage elements of the storage field are connected by way of a digit line to the regenerating circuit, the improvement therein comprising means for adjusting the inverting amplifier stages into the region of the labile point of the regenerating circuit, including a feedback circuit which comprises an odd number of inverter stages.
Claim 2
Dependent Claim 113 words
In a regenerating circuit for binary signals, in the form of a keyed flip-flop having one labile and two stable points, and with at least two inverting amplifier stages each including a switching transistor and a load transistor, in particular for stored signals and for the read-out of integrated single transistor storage elements which form a storage field in which the storage elements of the storage field are connected by way of a digit line to the regenerating circuit, the improvement therein comprising means for adjusting the inverting amplifier stages into the region of the labile point of the regenerating circuit, including a feedback circuit which comprises an odd number of inverter stages.
Claim 3
Dependent Claim 47 words
A regenerating circuit as set forth in claim 1, wherein said feedback circuit comprises at least one transistor connecting the input and output of each inverting amplifier stage, and wherein said flip-flop includes separately conducting feedback paths and electronic switching elements for opening and closing said paths.
Claim 4
Dependent Claim 21 words
A regenerating circuit according to claim 1 wherein each said switching transistor has a gate electrode connected to a digit line.
Claim 5
Dependent Claim 21 words
A regenerating circuit according to claim 1 wherein each said switching transistor has a drain electrode connected to a digit line.
Claim 6
Dependent Claim 42 words
A regenerating circuit according to claim 1, wherein the output of said inverter stage is connected to the input of an inverting amplifier stage so that the regenerating circuit comprises two inverting amplifier stages and one inverter stage connected in a chain.
Claim 7
Dependent Claim 17 words
A regenerating circuit according to claim 5, comprising electronic switches connected between the individual inverting amplifier stages.
Claim 8
Dependent Claim 27 words
A regenerating circuit according to claim 6, wherein said electronic switches and said inverting amplifier stages and said inverter stage are each constituted by field effect transistors.

References Cited (Backward Citations)

US3292014A Cited
US3651492A Cited
US3774176A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-02-24 1978-08-26 1979-02-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-02-24 1982-08-26 1983-02-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-02-24 1986-08-26 1987-02-25 $7700.00 Window Closed / Lapsed

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