Microprogram control system

Claim 2

A microprogram control system comprising control storage means for storing micro instructions and including means for dividing the micro instructions into a first set of micro instructions for controlling a data path and a second set of micro instructions for memory access control; sequence control means for reading out from said storage means in accordance with a microprogram the first and second sets of instructions independently of each other; and first and second registers for receiving respectively the first and second sets of instructions read out from said control storage means.

Claim 3

A microprogram control system comprising a first instruction register for receiving therein instructions belonging to a first set of instructions for controlling a data path, and a second instruction register for receiving therein instructions belonging to a second set of instructions for a memory access control aNd a sequence control of a microprogram itself, which is characterized in that at least one of said first and second instruction registers receives therein the instructions of its set of instructions based on the processing of the other set of instructions.

Claim 4

A microprogram control system comprising a first instruction register for receiving therein instructions belonging to a first set of instructions for controlling a data path, and a second instruction register for receiving therein instructions belonging to a second set of instructions for a memory access control aNd a sequence control of a microprogram itself, which is characterized in that at least one of said first and second instruction registers receives therein the instructions of its set of instructions based on the processing of the other set of instructions.

Claim 5

A microprogram control system according to claim 2, comprising control storage means for storing micro instructions and including means for dividing the micro instructions into a first set of instructions for controlling a data path and a second set of instructions for memory access control and sequence control of a microprogram itself, means for reading out from said storage means the first and second sets of instructions independently of each other, a first instruction register for receiving the first set of micro instructions read out from said control storage means, a second instruction register for receiving the second set of micro instructions read out from said control storage means, and memory means for storing in either of said first and second instruction registers its micro instructions in accordance with another set of micro instructions stored in the other of said instruction registers, in which one of said first and second instruction registers selects and receives therein, as its micro instructions, one of the micro instructions read out from said control storage means and from said memory means in accordance with the other set of micro instructions received in the other of said instruction registers.

Claim 6

A microprogram control system comprising: a. control storage means for storing micro instructions, said storage means including a first portion for receiving a first set of micro instructions for controlling a data path and a second portion for receiving a second set of micro instructions for memory access control; b. sequence control means for reading out from said storage means in accordance with a microprogram the first and second sets of instructions independently of each other; and c. first and second registers for receiving, respectively, the first and second sets of instructions read out from said control storage means.

Claim 7

A microprogram control system comprising: a. control storage means for storing micro instructions, said storage means including a first portion for receiving a first set of micro instructions for controlling a data path and a second portion for receiving a second set of micro instructions for memory access control; b. sequence control means for reading out from said storage means in accordance with a microprogram the first and second sets of instructions independently of each other; and c. first and second registers for receiving, respectively, the first and second sets of instructions read out from said control storage means.

Claim 8

The microprogram control system as claimed in claim 4, wherein there is further included memory means for storing in one of said first and second instruction registers its micro instructions in accordance with another set of micro instructions stored in the other of said instruction registers.

Claim 9

The microprogram control system as claimed in claim 4, wherein said sequence control means includes a micro instruction counter means for accessing a predetermined address of said control storage means and for reading out therefrom one of the first and second sets of instructions in accordance with the predetermined address.

Claim 10

The microprogram control system as claimed in claim 6, wherein said sequence control means further includes an incremental address circuit responsive to the reading out of an instruction from said control storage means for incrementing the address set by said micro instruction counter means.

Claim 11

The microprogram control system as claimed in claim 4, wherein there is included decoder means associated with said first register for determinig whether a predetermined condition has been met, and memory means for storing selected instructions of said first set and responsive to an indication by said decoder that the predetermined condition has been met for applying selected of the stored instructions of the first set to said second register.

Claim 12

The microprogram control system as claimed in claim 4, wherein there is included a a register group associated with said second register for processing accumulated instructions derived therefrom and wherein said register group is responsive to an accumulation of instructions therein for determining which of its instructions set in said first register are to be carried out.