US3696340A
Expired / Lapsed
US
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Microprogram execution control for fault diagnosis
Assignee: Toshiba Corp
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Filing: 1970-11-09
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Granted: 1972-10-03
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Expires: 1990-11-09
Abstract
Abstract A microprogram execution control for fault diagnosis includes a first and a second address register. The first address register designates the microaddress of one microstep stored in a fixed memory which is designated by a diagnostic microprogram information succeeding a diagnostic program instruction from a main memory. After one microstep is executed, the first address register designates a specified microaddress in the fixed memory, and the second address register stores the microaddress of a next microstep to be executed. At a step during the succeeding diagnostic routine, the content of the second address register is stored into the main memory.
Inventors
- 👤 Shigenori Matsushita
- 👤 Fumitaka Sato
- 👤 Haruhisa Miura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:12
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/2205; G06F11/2236; G06F9/00; G06F9/06; G06F9/22
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
183 words
A microprogram execution control for fault diagnosis comprising: a main memory for extrinsically variable program instructions and information, said instructions including at least one instruction for designating a microprogram for diagnosis; a fixed memory for storing microprograms each consisting of microsteps capable of information processing operations of said microprogram instructions stored in said main memory; a first address register for designating microaddresses associated with said microsteps in said fixed memory; sequence control means for ordinally advancing said microaddresses in said first address register in intrinsically predetermined order and for changing the microaddress in said first address register by a microprogram information accompanying said diagnosis program instruction while this diagnosis program instruction is being executed; setting means for setting a specified microaddress in said first address register after one microstep designated by said microprogram information is executed; a second address register including an input gate for storing a microaddress of a next microstep to be executed when said setting means sets said specified microaddress in said first address register; and means for storing the content of said second address register into said main memory.
Claim 2
Dependent Claim
183 words
A microprogram execution control for fault diagnosis comprising: a main memory for extrinsically variable program instructions and information, said instructions including at least one instruction for designating a microprogram for diagnosis; a fixed memory for storing microprograms each consisting of microsteps capable of information processing operations of said microprogram instructions stored in said main memory; a first address register for designating microaddresses associated with said microsteps in said fixed memory; sequence control means for ordinally advancing said microaddresses in said first address register in intrinsically predetermined order and for changing the microaddress in said first address register by a microprogram information accompanying said diagnosis program instruction while this diagnosis program instruction is being executed; setting means for setting a specified microaddress in said first address register after one microstep designated by said microprogram information is executed; a second address register including an input gate for storing a microaddress of a next microstep to be executed when said setting means sets said specified microaddress in said first address register; and means for storing the content of said second address register into said main memory.
Claim 3
Dependent Claim
29 words
A microprogram execution control for fault diagnosis according to claim 1 wherein said main memory stores said microprogram information at a special location accessable by said diagnostic program instruction.
Claim 4
Dependent Claim
45 words
A microprogram execution control for fault diagnosis according to claim 1 wherein said microprogram information includes a particular bit and wherein there is provided a flip-flop circuit responsive to said particular bit of said microprogram information for finishing the execution of said diagnostic program instruction.
Claim 5
Dependent Claim
33 words
A microprogram execution control for fault diagnosis according to claim 1 further comprising means for finishing the execution of said diagnostic program instruction by counting the number of said microsteps to be executed.
Claim 6
Dependent Claim
75 words
A microprogram execution control for fault diagnosis according to claim 4 wherein said diagnostic program information is accompanied by information specifying the number of said microsteps to be executed and wherein there is provided means for storing said number of said microsteps to be executed, said means having its content changed every time a microstep is executed thereby to finish the execution of said diagnostic program instruction when the content thereof reaches a predetermined value.
Claim 7
Dependent Claim
36 words
A microprogram execution control for fault diagnosis according to claim 1 wherein said input gate of said second address register is opened each time only when said microstep designated by said diagnostic program instruction is executed.
Claim 8
Dependent Claim
47 words
A microprogram execution control for fault diagnosis according to claim 1 wherein said input gate of said second address register is closed from after said microaddress of said next microstEp is stored in said second address register until after said microaddress is stored in said main memory.
Claim 9
Dependent Claim
29 words
A microprogram execution control for fault diagnosis according to claim 1 wherein the content of said second address register is stored at a fixed location of said main memory.
Claim 10
Dependent Claim
35 words
A microprogram execution control for fault diagnosis according to claim 1 wherein said diagnosis program instruction accompanies an address associated with said main memory into which the content of said second address register is stored.
Claim 11
Dependent Claim
30 words
A microprogram execution control for fault diagnosis according to claim 1 wherein the content of said second address register is stored into said main memory according to said microprogram information.
Claim 12
Dependent Claim
69 words
A microprogram execution control for fault diagnosis according to claim 10 wherein said microprogram information includes a particular bit and wherein there is further provided a flip-flop circuit responsive to said particular bit of said microprogram information, and wherein the content of said second address register is stored into said main memory only when said flip-flop circuit is set in response to said particular bit of said microprogram information.
Claim 13
Dependent Claim
36 words
A microprogram execution control for fault diagnosis according to claim 10 wherein the content of said second address register is stored into said main memory each time a microstep designated by said microprogram information is executed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-03 | 1976-04-03 | 1976-10-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-03 | 1980-04-03 | 1980-10-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-03 | 1984-04-03 | 1984-10-03 | $7700.00 | Window Closed / Lapsed |