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US3863248A
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Digital compressor-expander
Assignee: Université de Sherbrooke
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Filing: 1973-01-02
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Granted: 1975-01-28
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Expires: 1993-01-02
Abstract
Abstract A compressor-expander for converting m digit coded signals into n digit coded signals according to a desired input-output continuous characteristic. The compressor comprises first means for converting the m digit coded signals into p digit coded signals, p<m, so that when the corresponding analog values x of the m digit coded signals are plotted on the X axis and the corresponding analog values y of the p digit coded signals plotted on the Y axis of a Cartesian coordinate system, they produce an input-output discontinuous characteristic composed of a plurality of successive straight line segments of different slopes, and second means responsive to the first means for converting the p digit coded signals into such n digit coded signals as determined by the desired input-output continuous characteristic.
Inventors
- 👤 Pierre A Deschenes
- 👤 Hubert Stephenne
- 👤 Michel Villeret
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 22:25
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/30; H03M7/50; H03G; H03G7/00; H03G7/007
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
131 words
A compressor for converting m digit coded signals into n digit coded signals wherein n< m, according to a desired inputoutput continuous characteriStic, comprising: a. first means for converting said m digit coded signals into p digit coded signals, p < m, so that when the corresponding analog values x of said m digit coded signals are plotted on the X axis and the corresponding analog values y of said p digit coded signals plotted on the Y axis of a Cartesian coordinate system, they produce an input-output discontinuous characteristic composed of a plurality of successive straight line segments of different slopes; and b. second means connected to said first means for converting said p digit coded signals into said n digit coded signals according to the desired input-output continuous characteristic.
Claim 2
Dependent Claim
131 words
A compressor for converting m digit coded signals into n digit coded signals wherein n< m, according to a desired inputoutput continuous characteriStic, comprising: a. first means for converting said m digit coded signals into p digit coded signals, p < m, so that when the corresponding analog values x of said m digit coded signals are plotted on the X axis and the corresponding analog values y of said p digit coded signals plotted on the Y axis of a Cartesian coordinate system, they produce an input-output discontinuous characteristic composed of a plurality of successive straight line segments of different slopes; and b. second means connected to said first means for converting said p digit coded signals into said n digit coded signals according to the desired input-output continuous characteristic.
Claim 3
Dependent Claim
144 words
A compressor as defined in claim 1, further comprising an input register for storing said m digit coded signals, an output register for storing said n digit coded signals, and wherein said first means includes a shift register, gate means for transferring said m digit coded signals stored in said input register into said shift register, means for detecting the most significant digits of said m digit coded signals which are indicative of the line segment to which said m digit coded signals belong, and means for isolating the less significant digits of highest order which are indicative of the point on said line segment corresponding approximately to said m digit coded signals, and a counter responsive to said detecting means for identifying said line segment, said most significant digits and said less significant digits of highest order being transferred into said second means.
Claim 4
Dependent Claim
60 words
A compressor as defined in claim 2, comprising a clock for generating a number of pulses which are applied to said shift register and to said counter, the number of pulses applied to said counter being determined by said detecting means and said pulses controlling the shifting of the shift register for isolating the less significant digits of highest order.
Claim 5
Dependent Claim
40 words
A compressor as defined in claim 1, wherein the compressor is of the PCM type and wherein the desired input-output characteristic is a continuous logarithmic function described by: f (x) y 1n (1 + Mu x)/1n (1 + Mu )
Claim 6
Dependent Claim
10 words
A compressor as defined in claim 4, wherein Mu 100.
Claim 7
Dependent Claim
39 words
A compressor as defined in claim 5, wherein the input-output discontinuous characteristic used in the first means is the one following the law Mu 255 with no less than seven and no more than eight digits and 15 segments.
Claim 8
Dependent Claim
26 words
A compressor as defined in claim 5, wherein the input-output discontinuous characteristic is the one following the law A 87.6 with eight digits and thirteen segments.
Claim 9
Dependent Claim
25 words
A compressor as defined in claim 1, wherein the second means is a memory capable of providing a fixed predetermined output for a predetermined input.
Claim 10
Dependent Claim
16 words
A compressor as defined in claim 8, wherein said memory is a read only memory (ROM).
Claim 11
Dependent Claim
115 words
An expander for converting an digit coded signal into a m digit coded signal, n < m comprising: a. first means for converting the n digit coded signals into p digit coded signals according to a desired input-output continuous characteristic; b. second means for converting said p digit coded signal into said m digit coded signals so that when the corresponding analog values x of said p digit coded signals are plotted on the X axis and the corresponding analog values y of said m digit coded signals plotted on the Y axis of a Cartesian coordinate system, they produce an input-output discontinuous characteristic composed of a plurality of successive line segments of different slopes.
Claim 12
Dependent Claim
115 words
An expander for converting an digit coded signal into a m digit coded signal, n < m comprising: a. first means for converting the n digit coded signals into p digit coded signals according to a desired input-output continuous characteristic; b. second means for converting said p digit coded signal into said m digit coded signals so that when the corresponding analog values x of said p digit coded signals are plotted on the X axis and the corresponding analog values y of said m digit coded signals plotted on the Y axis of a Cartesian coordinate system, they produce an input-output discontinuous characteristic composed of a plurality of successive line segments of different slopes.
Claim 13
Dependent Claim
129 words
An expander as defined in claim 10, further comprising an input register for storing said p digit coded signals and an output register for storing said m digit coded signals, aNd wherein said second means include a shift register, means for detecting the most significant digits of said p digit coded signals which are indicative of the line segment to which said p digit coded signals belong, and means for isolating the less significant digits of highest order which are indicative of the point on said line segment corresponding approximately to said p digit coded signals, a counter for registering the most significant digits of said p digit coded signals and means responsive to said counter for controlling said shift register so as to providesaid m digit coded signals.
Claim 14
Dependent Claim
46 words
An expander as defined in claim 11, comprising a clock for generating a number of pulses which are applied to said shift register and to said counter, the number of pulses applied to said shift register determining the output value of said m digit coded signals.
Claim 15
Dependent Claim
40 words
An expander as defined in claim 10, wherein the expander is of the PCM type and wherein the desired input-output characteristic is a continuous logarithmic function described by: f (x) y 1n (1 + Mu x)/1n (1 + Mu )
Claim 16
Dependent Claim
10 words
An expander as defined in claim 13, wherein Mu 100.
Claim 17
Dependent Claim
35 words
An expander as defined in claim 14, wherein the input-output discontinuous characteristic of the second means is of type Mu 255 with no less than 7 and no more than 8 bits and fifteen segments.
Claim 18
Dependent Claim
30 words
An expander as defined in claim 14, wherein the input-output discontinuous characteristic of the second means is the one following the law A 87.6 with eight bits and thirteen segments.
Claim 19
Dependent Claim
25 words
An expander as defined in claim 10, wherein the first means is a memory capable of providing a fixed predetermined output for a predetermined input.
Claim 20
Dependent Claim
16 words
An expander as defined in claim 17, wherein said memory is a read only memory (ROM).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-01-27 | 1978-07-29 | 1979-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-01-27 | 1982-07-29 | 1983-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-01-27 | 1986-07-29 | 1987-01-28 | $7700.00 | Window Closed / Lapsed |