Read only memory with annular fuse links

Claim 2

A memory device comprising insulating material supporting a plurality of first conductors, a plurality of second conductors and a plurality of electrical resistor links each providing an ohmic connection between a first conductor and a second conductor, each link comprising a film of electrically conductive material deposited on said insulating material and having dimensions and electrical resistance such that application of a voltage of a predetermined magnitude between a first conductor and a second conductor causes fusing of the corresponding link over an annular area of said film surrounding said first conductor but application of a voltage of half said predetermined magnitude does not cause fusing of said link.

Claim 3

A memory device as claimed in claim 1, in which said film is sandwiched between two matrices of conducting discs, the discs of one of said matrices being disposed in holes in said insulating material, the first conductors being arranged in rows and columns with the discs of one matrix connected both to a row conductor and a column conductor, a single further conductor being connected to the film whereby an annular area of the film may be fused around a disc by coincident current addressing.

Claim 4

A memory device as claimed in claim 1, in which said first conductors are disposed on one side of the resistive material and said second conductors are disposed on the other, said second conductors including elements projecting through said resistive material and into holes in said first conductors and said links comprising annular films of conductive material in said holes in said second conductors.

Claim 5

A memory device as claimed in claim 3, in which said elements projecting through said resistive material comprise electrically conductive material plated on to the walls of holes in said insulating material.

Claim 6

A memory device as claimed in claim 3, in which said first conductors and said links are deposited on a substrate of an insulating material and said first mentioned insulating material comprises a coating on said first conductors and said links, said coating to said first conductors and including elements projecting through said coating into contact with said links.

Claim 7

A memory device as claimed in claim 3, in which said first conductors are disposed parallel to each other and perpendicular to said second conductors and said links are disposed at intersections of first and second conductors.

Claim 8

A memory device comprising insulating material supporting a plurality of pairs of first conductors, a plurality of pairs of second conductors, and a plurality of electrical resistor links each providing an ohmic connection between a first conductor and a second conductor, each link comprising a film of electrically conductive material deposited on said insulating material and having dimensions and resistance such that application of a voltage of a predetermined magnitude between a first conductor and a second conductor causes fusing of the corresponding link over an annular area of said film surrounidng said first conductor but application of a voltage of half said magnitude does not cause fusing of said link, two of the four links between each pair of first conductors and each pair of second conductors having been fused so that one of the pair of first conductors is connected to one of the pair of second conductors and the other of the pair of first conductors is connected to the other of the pair of second conductors.

Claim 9

A memory device comprising insulating material supporting a plurality of pairs of first conductors, a plurality of pairs of second conductors, and a plurality of electrical resistor links each providing an ohmic connection between a first conductor and a second conductor, each link comprising a film of electrically conductive material deposited on said insulating material and having dimensions and resistance such that application of a voltage of a predetermined magnitude between a first conductor and a second conductor causes fusing of the corresponding link over an annular area of said film surrounidng said first conductor but application of a voltage of half said magnitude does not cause fusing of said link, two of the four links between each pair of first conductors and each pair of second conductors having been fused so that one of the pair of first conductors is connected to one of the pair of second conductors and the other of the pair of first conductors is connected to the other of the pair of second conductors.

Claim 10

A memory device as claimed in claim 7, comprising a respective differential amplifier having its inputs connected to each pair of second conductors and respective switching means connected to each pair of first conductors and operative either to apply earth potential to both conductors of the pair or to apply a positive potential to one conductor of the pair and a negative potential to the other.

Claim 11

A memory device as claimed in claim 8, including a respective second differential amplifier for each first differential amplifier, one input of each second differential amplifier being connected to the output of the corresponding first differential amplifier, the second inputs of the second differential amplifiers being interconnected, and a respective diode for each second differential amplifier connecting the output thereof to its second input whereby the second differential amplifier having the largest signal at its first input produces a signal at its output and the remaining second differential amplifiers are cut off.