US3859636A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Microprogram controlled data processor for executing microprogram instructions from microprogram memory or main memory
Assignee: AT&T Inc
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Filing: 1973-03-22
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Granted: 1975-01-07
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Expires: 1993-03-22
Abstract
Abstract A microprogram controlled data processor for executing microprogram instructions from the microprogram memory or from the main memory having a control unit, a random access readable and writable main memory containing main program sequences and data, and a random access read-only microprogram memory containing microprogram sequences and fixed data. Control circuitry is provided in the control unit for directly executing instructions which are coded in microprogram instruction code format and stored in the main memory. The control circuitry includes a flip-flop which is selectively set and reset by the execution of corresponding microprogram instructions. The states of the flip-flop determine the source of subsequent microprogram instructions as being the microprogram memory or the main program memory, respectively.
Inventors
- 👤 Robert Wilcox Cook
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:23
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/30; G06F9/3017; G06F9/22; G06F9/26; G06F9/262; G06F9/268; G06F9/30145
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
194 words
A microprogram controlled data processor wherein execution of one microprogram instruction can determine the state of the processor for execution of subsequent instructions comprising: a random access readable and writable main memory; a random access and read-only microprogram memory; and a control unit comprising: means for obtaining memory words comprising main memory instructions, data or microprogram instructions from said main memory or for writing such memory words into said main memory; memory register means for storing at least a portion of each of the memory words obtained from said main memory; a microprogram instruction register; decoding means connected to said microprogram instruction register and responsive to the contents thereof for generating processor control signals; means comprising a microprogram memory address register and first gating means for selectively transferring microprogram instructions from said microprogram memory to said microprogram instruction register; second gating means for transferring microprogram instructions from said memory register means to said microprogram instruction register; and a first flip-flop responsive to certain of said processor control signals generated during execution of microprogram instructions for selectively enabling or disabling respective ones of said first and second gating means during execution of subsequent microprogram instructions.
Claim 2
Dependent Claim
194 words
A microprogram controlled data processor wherein execution of one microprogram instruction can determine the state of the processor for execution of subsequent instructions comprising: a random access readable and writable main memory; a random access and read-only microprogram memory; and a control unit comprising: means for obtaining memory words comprising main memory instructions, data or microprogram instructions from said main memory or for writing such memory words into said main memory; memory register means for storing at least a portion of each of the memory words obtained from said main memory; a microprogram instruction register; decoding means connected to said microprogram instruction register and responsive to the contents thereof for generating processor control signals; means comprising a microprogram memory address register and first gating means for selectively transferring microprogram instructions from said microprogram memory to said microprogram instruction register; second gating means for transferring microprogram instructions from said memory register means to said microprogram instruction register; and a first flip-flop responsive to certain of said processor control signals generated during execution of microprogram instructions for selectively enabling or disabling respective ones of said first and second gating means during execution of subsequent microprogram instructions.
Claim 3
Dependent Claim
51 words
A microprogram controlled data processor in accordance with claim 8 wherein: each of said microprogram memory words comprises an instruction portion and a next address portion; and said microprogram instruction register comprises an instruction portion and a next address portion for storing the respective corresponding portions of said microprogram memory words.
Claim 4
Dependent Claim
56 words
A microprogram controlled data processor in accordance with claim 1 wherein: said control unit further comprises means responsive to each memory word obtained from said main memory for indicating the presence or absence of information in said memory register means and for enabling or disabling said second gating means during execution of said subsequent microprogram instructions.
Claim 5
Dependent Claim
53 words
A microprogram controlled data processor in accordance with claim 3 wherein: said means for indicating the presence of information in said memory register means and for controlling said second gating means comprises a second flip-flop; and said second gating means is responsive to the combined states of said first and said second flip-flops.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-01-06 | 1978-07-08 | 1979-01-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-01-06 | 1982-07-08 | 1983-01-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-01-06 | 1986-07-08 | 1987-01-07 | $7700.00 | Window Closed / Lapsed |