Data processing machine

Claim 2

A serial step stored program digital computer comprising: input means for the entry of data, macroinstructions and microinstructions, storage means including: a first portion of said storage means for the storage of data and macroinstructions, and a second portion of said storage means for the storage of microinstructions: means selectively coupling said input means to said storage means for writing data and macroinstructions into the first portion of said storage means and for reading the same therefrom, and means selectively coupling said input means to said storage means for writing microinstructions into the second portion of the storage means and for reading the same therefrom, microprogram control means including: means for selectively reading microinstructions from said second portion of said storage means in a predetermined sequence and for decoding the same, and means for modifying one or more of such read and decoded microinstructions according to macroinstructions to be implemented in processing the data in the first portion of said storage means; data manipulation means including: operating means under the control of the microinstructions derived by the microprogram control means from the storage means and as such microinstructions may be modified thereby for operating on the stored data, and output means operatively associated with said operating means for displaying the result of the operation on the stored data.

Claim 3

A digital computer as set forth in claim 1 wherein said input means includes means for entering a new set of microinstructions to alter the microinstructions stored in said second portion of said storage means to adapt the computer to perform a varied operation on data stored in the first portion of said storage means.

Claim 4

A digital computer as set forth in claim 1 wherein said storage means comprising a magnetic disc which is divided into data and macrostorage tracks, microstorage tracks, timing tracks and recirculation tracks operatively associated with and usable by said data manipulation means.

Claim 5

A digital computer as set forth in claim 1 additionally including means for expanding the second portion of said storage means into the first portion of said storage means under microprogram control.

Claim 6

A digital computer as set forth in claim 1 wherein said data manipulation means includes: a first recirculation means for synchronizing read and write operations with said storage means, a second recirculation means including stored logic and means for storing and processing each macroinstruction stored in said first portion of said storage means, means for applying a decimal correction to said second recirculation means, a second register connected to said input means, an adder coupled to said second recirculation means for processing data in said manipulation means.

Claim 7

A digital computer as set forth in claim 5 wherein said data manipulation means additionally includes: a macroinsTruction program counter in said second recirculation means, and means for selectively incrementing the count of said program counter under microprogram control each time one macroinstruction is executed by said microinstructions.

Claim 8

A digital computer as set forth in claim 6 wherein said data manipulation means additionally includes: macroprogram register means in said second recirculation means for storing a sequence of the macroinstructions to be executed, and means for sequentially selecting one or more portions of said sequence of macroinstructions under the control of said macroinstruction program counter.

Claim 9

A digital computer as set forth in claim 6 wherein said data manipulation means additionally includes: a macroinstruction syllable counter in said second recirculation means; said macroinstruction syllable counter adapted to be incremented under microinstruction control each time one syllable of one macroinstruction is executed; said macroinstruction program counter being incremented by one each time said syllable counter is reset to zero.

Claim 10

A digital computer as set forth in claim 1 wherein said microprogram control means comprises: microinstruction register means for temporarily storing a selected microinstruction, control means for selecting and enabling logic gates within said data manipulation means as directed by the microinstruction in said microinstruction register, and timing means for determining the period during which the selected logic gates in said data manipulation means are enabled by said control means.

Claim 11

A digital computer as set forth in claim 3 wherein said timing tracks in said storage means comprise a sector track portion for storing addresses of groups of information and a clock pulse track portion for storing a pulse for each bit on a data track, said clock track portion being used to count characters in the addresses on said sector track; at least one address on said sector track containing a reference code to clear address-timing counters when said computer is started or immediately after an error is detected by said computer.

Claim 12

A digital computer in which serial step programmable instructions for manipulating data are accomplished by sequentially calling forth and executing a string of microinstructions for each such programmed instruction at least a portion of said microinstructions having been previously recorded, said computer comprising: divided input register means including a digit portion for storing a least significant portion of a character and a zone portion for storing a most significant portion of a character, said character comprising a predetermined number of bits, an arithmetic unit, cyclic memory means including a first addressable main memory section for storing object data and macroprogram instructions, and a second addressable memory section for storing microprogram instructions, recirculating register means operatively associated with said input means and said cyclic memory means for synchronizing read-write operations therebetween and operatively associated with said arithmetic unit for selectively shifting data relative to a predetermined reference during arithmetic operations, instruction register means for sequentially storing and implementing said microinstructions which are withdrawn from said second addressable memory, control matrix means for generating logical control signals in response to the contents of said instruction register means, and gating means responsive to said matrix means for selectively interchanging information between said individual portions of said input register means and said recirculating register means.

Claim 13

A digital computer in which serial step programmable instructions for manipulating data are accomplished by sequentially calling forth and executing a string of microinstructions for each such programmed instruction at least a portion of said microinstructions having been previously recorded, said computer comprising: divided input register means including a digit portion for storing a least significant portion of a character and a zone portion for storing a most significant portion of a character, said character comprising a predetermined number of bits, an arithmetic unit, cyclic memory means including a first addressable main memory section for storing object data and macroprogram instructions, and a second addressable memory section for storing microprogram instructions, recirculating register means operatively associated with said input means and said cyclic memory means for synchronizing read-write operations therebetween and operatively associated with said arithmetic unit for selectively shifting data relative to a predetermined reference during arithmetic operations, instruction register means for sequentially storing and implementing said microinstructions which are withdrawn from said second addressable memory, control matrix means for generating logical control signals in response to the contents of said instruction register means, and gating means responsive to said matrix means for selectively interchanging information between said individual portions of said input register means and said recirculating register means.

Claim 14

The computer defined in claim 11 additionally including: an information register, and logical gating means for selectively coupling said information register to said recirculation register means to vary the length of said recirculation register means.

Claim 15

The computer defineD in claim 11 additionally including: bistable control means for selectively permitting the programmable storage of microprogram instructions in said main memory section of said cyclic memory means, and means for modifying the address of the next microinstruction as determined by said microinstruction register when said bistable control means is in a predetermined state.

Claim 16

The computer defined in claim 11 wherein: said cyclic memory means comprises a rotatably supported multitrack magnetic disc including a plurality of the read-write heads for selectively reading and writing data in said main memory section and a plurality of read heads for selectively reading information previously stored in said second memory section, and additionally including, track pointer register means for selectively addressing and activating ones of said heads for accomplishing information transfer to and from said magnetic disc, and gating means for selectively transferring bits of a character from predetermined positions of said instruction register means and said individual portions of said input register means to said track pointer register means.

Claim 17

The computer defined in claim 14 wherein: said multitrack magnetic disc additionally includes at least one timing track for storing a pattern of timing pulses, and wherein said instruction register means includes an instruction portion and a next instruction address portion, and additionally including clock counter means responsive to said pattern of timing pulses for generating a cyclic timing pulse pattern, gating means for reading information from said microinstruction portion of said disc into said instruction register means, and timing matrix means responsive to said clock counter means and to said control matrix means for activating said gating means to serially read microinstruction data into said microinstruction register in accordance with the contents of said address portion of said instruction register means.

Claim 18

A stored program computer in which programmable instructions for manipulating object data are accomplished by calling forth and executing a string of at least one microinstruction for each such programmed instruction, said computer comprising: an arithmetic unit, a multisection input register including a first section for storing a first portion of a character and a second section for storing a second portion of a character, rotatable magnetic memory means including a read-write addressable main memory section for storing object data and macroprogram instructions, an addressable read memory section for storing microprogram instructions and a timing track section for storing a pattern of timing pulses, program register means for storing macroprogram instructions withdrawn from said main memory section, microprogram register means for storing microprogram instructions withdrawn from said read memory section, said microprogram register means including an instruction section and a next instruction address section, a plurality of recirculation storage register means for temporarily storing program and object data words, means for selectively modifying the effective storage length of at least one of said recirculation storage register means, gating means for selectively interchanging the contents of individual ones of said sections of said input register means with the contents of a portion of said recirculation register means, transfer gating means for transferring the contents of ones of said sections of said input register means to said microprogram register means, means for selectively coupling an output of said section of said input register means and an output of said recirculation means to the input of said arithmetic unit, and means for selectively coupling the output of said arithmetic unit to an input of said sections of said input register means and to an input of said recirculation means.

Claim 19

A stored program computer in which programmable instructions for manipulating object data are accomplished by calling forth and executing a string of at least one microinstruction for each such programmed instruction, said computer comprising: an arithmetic unit, a multisection input register including a first section for storing a first portion of a character and a second section for storing a second portion of a character, rotatable magnetic memory means including a read-write addressable main memory section for storing object data and macroprogram instructions, an addressable read memory section for storing microprogram instructions and a timing track section for storing a pattern of timing pulses, program register means for storing macroprogram instructions withdrawn from said main memory section, microprogram register means for storing microprogram instructions withdrawn from said read memory section, said microprogram register means including an instruction section and a next instruction address section, a plurality of recirculation storage register means for temporarily storing program and object data words, means for selectively modifying the effective storage length of at least one of said recirculation storage register means, gating means for selectively interchanging the contents of individual ones of said sections of said input register means with the contents of a portion of said recirculation register means, transfer gating means for transferring the contents of ones of said sections of said input register means to said microprogram register means, means for selectively coupling an output of said section of said input register means and an output of said recirculation means to the input of said arithmetic unit, and means for selectively coupling the output of said arithmetic unit to an input of said sections of said input register means and to an input of said recirculation means.

Claim 20

The computer Defined in claim 16 wherein said program-register means simultaneously stores a plurality of sequential program instruction words and additionally including: program counter means for controlling the sequential execution of individual ones of said plurality of program instructions stored in said program register means in accordance with the content of said program counter means, and means including carry circuitry means associated with said arithmetic unit for incrementing said program counter upon the completion of predetermined program instruction steps.

Claim 21

A digital computer as set forth in claim 3 wherein said timing tracks in said storage means include a sector track containing addresses of groups of stored information and a clock pulse track for generating a pulse for each bit on a data track, and means for counting the characters that occur in the addresses on said sector tracks.

Claim 22

A serial step stored program digital computer comprising: input means for the entry of data, macroinstructions and microinstructions, storage means including: a first portion of said storage means for the storage of data and macroinstructions, and a second portion of said storage means for the storage of microinstructions, the format of each such microinstruction including an operation portion and an address portion designating the address of the next succeeding microinstruction occuring in a predetermined normal string of such microinstructions; means selectively coupling said input means to said storage means for writing data and macroinstructions into the first portion of said storage means and for reading the same therefrom, and means selectively coupling said input means to said storage means for writing microinstructions into the second portion of the storage means and for reading the same therefrom; microprogram control means including: means for selectively reading microinstructions from said second portion of said storage means in a sequential order determined by the address portions thereof and for decoding the same, and means for modifying one of said format portions of a selected microinstruction read from the storage means; and data manipulation means including: operating means under the control of the microinstructions derived by the microprogram control means from the storage means and subject to modification thereby for operating on the stored data, and output means operatively associated with said operating means for displaying the result of the operation on the stored data.

Claim 23

A serial step stored program digital computer comprising: input means for the entry of data, macroinstructions and microinstructions, storage means including: a first portion of said storage means for the storage of data and macroinstructions, and a second portion of said storage means for the storage of microinstructions, the format of each such microinstruction including an operation portion and an address portion designating the address of the next succeeding microinstruction occuring in a predetermined normal string of such microinstructions; means selectively coupling said input means to said storage means for writing data and macroinstructions into the first portion of said storage means and for reading the same therefrom, and means selectively coupling said input means to said storage means for writing microinstructions into the second portion of the storage means and for reading the same therefrom; microprogram control means including: means for selectively reading microinstructions from said second portion of said storage means in a sequential order determined by the address portions thereof and for decoding the same, and means for modifying one of said format portions of a selected microinstruction read from the storage means; and data manipulation means including: operating means under the control of the microinstructions derived by the microprogram control means from the storage means and subject to modification thereby for operating on the stored data, and output means operatively associated with said operating means for displaying the result of the operation on the stored data.

Claim 24

A digital computer as set forth in claim 19 wherein said format modifying means modifies the address portion of a selected microinstruction read from the storage means for altering the string of which the microinstruction is a part.

Claim 25

A digital computer as set forth in claim 19 wherein said format modifying means modifies the operation portion of a selected microinstruction read from the storage means for changing its operation.

Claim 26

A digital computer in which programmable instructions for manipulating data are accomplished by sequentially calling forth and executing a string of microinstructions including, in combination: input means including a digit portion for storing a lesser significant portion of a character and a zone portion for storing a more significant portion of a character, memory means including separate sections for storing data, macroinstructions and microinstructions and further including means for performing write-in and readout operations with respect to the storage areas of said memory sections, an instruction register for sequentially storing and implementing the microinstructions withdrawn from the microinstruction storage section of said memory means, control means for generating control signals in response to the contents of said instruction register, data manipulation means including a recirculation path for performing arithmetic and logic operations and a second recirculaTion path for synchronizing the flow of data and instructions to and from the memory means, and gating means responsive to the control signals generated by said control means for selectively interchanging information between said individual portions of said input means and the recirculation paths of said data manipulation means.

Claim 27

A digital computer in which programmable instructions for manipulating data are accomplished by sequentially calling forth and executing a string of microinstructions including, in combination: input means including a digit portion for storing a lesser significant portion of a character and a zone portion for storing a more significant portion of a character, memory means including separate sections for storing data, macroinstructions and microinstructions and further including means for performing write-in and readout operations with respect to the storage areas of said memory sections, an instruction register for sequentially storing and implementing the microinstructions withdrawn from the microinstruction storage section of said memory means, control means for generating control signals in response to the contents of said instruction register, data manipulation means including a recirculation path for performing arithmetic and logic operations and a second recirculaTion path for synchronizing the flow of data and instructions to and from the memory means, and gating means responsive to the control signals generated by said control means for selectively interchanging information between said individual portions of said input means and the recirculation paths of said data manipulation means.

Claim 28

A digital computer in which programmable instructions for manipulating data are accomplished by sequentially calling forth and executing a string of microinstructions including, in combination: input register means for the entry of data, macroinstructions and microinstructions, rotatable memory means coupled to said input register means and having separate sections for storing data, macroinstructions and microinstructions and further including means for performing write-in and readout operations with respect to the storage areas of said memory sections, a macroinstructions register for storing the macroprograms withdrawing from the macrostorage section of said memory means, a microinstruction register for storing the microinstructions withdrawn from the microinstructions storage section of said memory means, data manipulation means including recirculation path means capable of being shifted ''''right'''' and ''''left'''' for performing arithmetic and logic operations and further including logic gates for the control of such operations, control means for generating control signals in response to the contents of said macroinstruction and microinstruction registers for selecting and enabling the logic gates of said data manipulation means, and timing means for determining the period during which the selected logic gates in the data manipulation means are enabled by said control means.

Claim 29

A digital computer in which programmable instructions for manipulating data are accomplished by sequentially calling forth and executing a string of microinstructions including, in combination: input register means for the entry of data, macroinstructions and microinstructions, rotatable memory means coupled to said input register means and having separate sections for storing data, macroinstructions and microinstructions and further including means for performing write-in and readout operations with respect to the storage areas of said memory sections, a macroinstructions register for storing the macroprograms withdrawing from the macrostorage section of said memory means, a microinstruction register for storing the microinstructions withdrawn from the microinstructions storage section of said memory means, data manipulation means including recirculation path means capable of being shifted ''''right'''' and ''''left'''' for performing arithmetic and logic operations and further including logic gates for the control of such operations, control means for generating control signals in response to the contents of said macroinstruction and microinstruction registers for selecting and enabling the logic gates of said data manipulation means, and timing means for determining the period during which the selected logic gates in the data manipulation means are enabled by said control means.