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US3855690A Expired / Lapsed US ⏱️ 0.0 years remaining

Application of facet-growth to self-aligned schottky barrier gate field effect transistors

Assignee: Westinghouse Electric Corp
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Filing: 1972-12-26
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Granted: 1974-12-24
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Expires: 1992-12-26
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Abstract

Abstract A semiconductor device and particularly a self-aligned Schottky barrier gate field-effect transistor is made by epitaxial growth of facets corresponding to the source and drain regions on a surface of a semiconductor body through spaced apart preferably elongated windows in a masking layer and overgrowing edge portions of the masking layer at the windows to form overgrown portions on the facets. The channel region of the transistor is previously formed in the semiconductor body, preferably by epitaxial growth of a layer on a surface of a semiconductor body having a semi-insulating layer adjoining the surface. After removal of the masking layer, the Schottky barrier gate is selfaligned by deposition of metal on the unshielded portions of the planar surface between the facets.

Inventors

  • 👤 H Kim
  • 👤 M Driver

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 21:51
CPC Classifications
H; H10; H10D; H10D99/00; H10D30/00; H10D30/80; H10D30/87; H10P; H10P95/00; H10P95/50; Y; Y10; Y10S; Y10S148/00; Y10S148/026; Y10S148/056; Y10S148/115; Y10S148/139

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 168 words
A method for making a self-aligned field-effect transistor comprising the steps of: a. forming a masking layer having at least two spaced apart windows therethrough on a planar surface of a semiconductor body having two impurity regions therein of different conductivity forming an abrupt change in impurity concentrations between impurity regions and having one impurity region adjoining said planar surface; b. epitaxially growing facets of the same conductivity type as the impurity region adjoining the planar surface from said surface through said windows and overgrowing edge portions of said masking layer at said windows to form overgrowth portions on said facets; c. removing said masking layer to cause said overgrowth portions of said facets to overhang portions of the surface adjoining the facets and shield said portions of the surface against metal deposition; d. depositing metal on the unshielded portions of the surface between the facets to form a self-aligned Schottky barrier contact to the surface; and e. depositing metal on the facets to make electrical contacts therewith.
Claim 2
Independent Claim 168 words
A method for making a self-aligned field-effect transistor comprising the steps of: a. forming a masking layer having at least two spaced apart windows therethrough on a planar surface of a semiconductor body having two impurity regions therein of different conductivity forming an abrupt change in impurity concentrations between impurity regions and having one impurity region adjoining said planar surface; b. epitaxially growing facets of the same conductivity type as the impurity region adjoining the planar surface from said surface through said windows and overgrowing edge portions of said masking layer at said windows to form overgrowth portions on said facets; c. removing said masking layer to cause said overgrowth portions of said facets to overhang portions of the surface adjoining the facets and shield said portions of the surface against metal deposition; d. depositing metal on the unshielded portions of the surface between the facets to form a self-aligned Schottky barrier contact to the surface; and e. depositing metal on the facets to make electrical contacts therewith.
Claim 3
Dependent Claim 38 words
A method for making a self-aligned field-effect transistor as set forth in claim 1 wherein: the steps of depositing said Schottky barrier contact to the planar surface and depositing said electrical contacts to the facets are done simultaneously.
Claim 4
Dependent Claim 72 words
A method for making a self-aligned field-effEct transistor as set forth in claim 1 wherein: the impurity regions are formed in the semiconductor body by first providing a semiconductor body with a given level of impurity therethrough, polishing said semiconductor body along a lattice plane of said body to form said planar surface, and epitaxially growing a layer with an impurity concentration of different conductivity from said body on said planar surface.
Claim 5
Dependent Claim 28 words
A method for making a self-aligned field-effect transistor as set forth in claim 3 wherein: said polishing is done along the (001) lattice plane of the semiconductor body.
Claim 6
Independent Claim 192 words
A method for making a self-aligned field-effect transistor of gallium arsenide comprising the steps of: a. forming a semi-insulating semiconductor body of gallium arsenide; b. polishing said semiconductor body along a lattice plane to form a planar surface on said body; c. epitaxially growing a layer on said planar surface having an N-type impurity concentration between 5 X 1014 and 5 X 1017/cm3; d. forming a masking layer on said epitaxially grown layer having spaced apart windows therethrough; e. epitaxially growing facets of the same semiconductivity as the epitaxially grown layer with an impurity concentration of greater than 1 X 1018/cm3 through said windows and overgrowing edge portions of said masking layer at said windows to form overgrowth portions on said facets; f. removing said masking layer to cause said overgrowth portions of said facets to overhang portions of said planar surface adjoining the facets and shield said portions of the planar surface against metal deposition; g. depositing metal on the unshielded portions of the planar surface between the facets to form a Schottky barrier contact to the planar surface; and h. depositing metal on the facets to make electrical contacts therewith.
Claim 7
Independent Claim 192 words
A method for making a self-aligned field-effect transistor of gallium arsenide comprising the steps of: a. forming a semi-insulating semiconductor body of gallium arsenide; b. polishing said semiconductor body along a lattice plane to form a planar surface on said body; c. epitaxially growing a layer on said planar surface having an N-type impurity concentration between 5 X 1014 and 5 X 1017/cm3; d. forming a masking layer on said epitaxially grown layer having spaced apart windows therethrough; e. epitaxially growing facets of the same semiconductivity as the epitaxially grown layer with an impurity concentration of greater than 1 X 1018/cm3 through said windows and overgrowing edge portions of said masking layer at said windows to form overgrowth portions on said facets; f. removing said masking layer to cause said overgrowth portions of said facets to overhang portions of said planar surface adjoining the facets and shield said portions of the planar surface against metal deposition; g. depositing metal on the unshielded portions of the planar surface between the facets to form a Schottky barrier contact to the planar surface; and h. depositing metal on the facets to make electrical contacts therewith.
Claim 8
Dependent Claim 27 words
A method for making self-aligned field-effect transistors as set forth in claim 5 wherein: said facets are epitaxially grown to a thickness between 2 and 4 microns.
Claim 9
Dependent Claim 37 words
A method for making self-aligned field-effect transistors as set forth in claim 5 wherein: the steps of depositing said Schottky barrier contact to the planar surface and depositing said electrical contacts to the facets are done simultaneously.
Claim 10
Dependent Claim 26 words
A method for making self-aligned field-effect transistors as set forth in claim 5 wherein: said masking layer is between about 2,000 and 4,000 Angstroms in thickness.

References Cited (Backward Citations)

US3244555A Cited
US3639186A Cited
US3678573A Cited
US3746908A Cited
US3675313A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-12-23 1978-06-24 1978-12-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-12-23 1982-06-24 1982-12-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-12-23 1986-06-24 1986-12-24 $7700.00 Window Closed / Lapsed

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