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US3851316A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor memory device

Assignee: Toshiba Corp
•
Filing: 1973-04-13
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Granted: 1974-11-26
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Expires: 1993-04-13
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Abstract

Abstract A semiconductor memory device which has time interval control means of the refresh cycle. In particular, the control means varies the time interval according to the temperature around the memory elements. In a preferred embodiment, the control means includes a thermistor arranged in the circuit with a capacitor so as to be responsive to the temperature variations.

Inventors

  • 👤 K Kodama

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 16:20
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/406

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 215 words
A refresh signal generator comprising: a first NAND gate, a second NAND gate, a third NAND gate, a first thermistor, a second thermistor, a first capacitor, a second capacitor, said first NAND gate having a first input and a second input and an output, said second NAND gate having a first input and a second input and an output, said third NAND gate having a first input and a second input and an output, means connecting a start signal to the said first input of said first NAND gate, means connecting the output of said first NAND gate to the said first and second inputs of said second NAND gate, means connecting the output of said second NAND gate to the said first and second inputs of said third NAND gate, means connecting the output of said third NAND gate to the said second input of said first NAND gate, means connecting said first thermistor between a voltage source and the said output of said first NAND gate, means connecting said first capacitor between said output of said first NAND gate and ground, means connecting said second thermistor between a voltage source and the output of said second NAND gate, means connecting said second capacitor between the output of said second NAND gate and ground.
Claim 2
Dependent Claim 215 words
A refresh signal generator comprising: a first NAND gate, a second NAND gate, a third NAND gate, a first thermistor, a second thermistor, a first capacitor, a second capacitor, said first NAND gate having a first input and a second input and an output, said second NAND gate having a first input and a second input and an output, said third NAND gate having a first input and a second input and an output, means connecting a start signal to the said first input of said first NAND gate, means connecting the output of said first NAND gate to the said first and second inputs of said second NAND gate, means connecting the output of said second NAND gate to the said first and second inputs of said third NAND gate, means connecting the output of said third NAND gate to the said second input of said first NAND gate, means connecting said first thermistor between a voltage source and the said output of said first NAND gate, means connecting said first capacitor between said output of said first NAND gate and ground, means connecting said second thermistor between a voltage source and the output of said second NAND gate, means connecting said second capacitor between the output of said second NAND gate and ground.
Claim 3
Dependent Claim 134 words
A refresh signal generator comprising: a thermistor, a capacitor, a voltage comparator, a NAND gate, said voltage comparator having a first voltage input and a second input and an output, said NAND gate having a first input and a second input and an output, means connecting said thermistor between a voltage source and the first input of said voltage comparator, means connecting the said capacitor between the first input of said voltage comparator and ground, means connecting a voltage source to the second input of said voltage comparator, means connecting the output of said voltage comparator to the first input of said NAND gate, means connecting a start signal to the second input of said NAND gate, means connecting the output of said NAND gate to the junction between said thermistor and said capacitor.
Claim 4
Dependent Claim 134 words
A refresh signal generator comprising: a thermistor, a capacitor, a voltage comparator, a NAND gate, said voltage comparator having a first voltage input and a second input and an output, said NAND gate having a first input and a second input and an output, means connecting said thermistor between a voltage source and the first input of said voltage comparator, means connecting the said capacitor between the first input of said voltage comparator and ground, means connecting a voltage source to the second input of said voltage comparator, means connecting the output of said voltage comparator to the first input of said NAND gate, means connecting a start signal to the second input of said NAND gate, means connecting the output of said NAND gate to the junction between said thermistor and said capacitor.
Claim 5
Dependent Claim 249 words
A refresh signal generator comprising: a first resistor, a second resistor, a first capacitor, a second capacitor, a first voltage comparator having a first input and a second input and an output, a second voltage comparator having a first input and a second input and an output, a first NAND gate having a first input and a second input and an output, a second NAND gate having a first input and a second input and an output, means connecting said first thermistor between a voltage source and the first input of said first voltage comparator, means connecting said first capacitor between the first input of said first voltage comparator and ground, means connecting the second input of said first voltage comparator to a voltage source, means connecting the output of said first voltage comparator to the first and second inputs of said first NAND gate, means connecting said second thermistor between a voltage source and the first input of said second voltage comparator, means connecting the output of said first NAND gate to the first input of said second voltage comparator, means connecting said second capacitor between the first input of said second voltage comparator and ground, means connecting the output of said second voltage comparator to the first input of said second NAND gate, means connecting a start signal to the second input of said second NAND gate, means connecting the output of said second NAND gate to the junction between said first thermistor and said first capacitor.
Claim 6
Dependent Claim 249 words
A refresh signal generator comprising: a first resistor, a second resistor, a first capacitor, a second capacitor, a first voltage comparator having a first input and a second input and an output, a second voltage comparator having a first input and a second input and an output, a first NAND gate having a first input and a second input and an output, a second NAND gate having a first input and a second input and an output, means connecting said first thermistor between a voltage source and the first input of said first voltage comparator, means connecting said first capacitor between the first input of said first voltage comparator and ground, means connecting the second input of said first voltage comparator to a voltage source, means connecting the output of said first voltage comparator to the first and second inputs of said first NAND gate, means connecting said second thermistor between a voltage source and the first input of said second voltage comparator, means connecting the output of said first NAND gate to the first input of said second voltage comparator, means connecting said second capacitor between the first input of said second voltage comparator and ground, means connecting the output of said second voltage comparator to the first input of said second NAND gate, means connecting a start signal to the second input of said second NAND gate, means connecting the output of said second NAND gate to the junction between said first thermistor and said first capacitor.
Claim 7
Dependent Claim 23 words
A refresh signal generator in accordance with claim 1 further including a differential amplifier connected to the output of said third NAND gate.
Claim 8
Dependent Claim 22 words
A refresh signal generator in accordance with claim 2 further including a differential amplifier connected to the output of said NAND gate.
Claim 9
Dependent Claim 32 words
A refresh signal generator in accordance with claim 3 further including a differential amplifier connected to the output of said first NAND gate and the first input of said second voltage comparator.

References Cited (Backward Citations)

US3705392A Cited
US3760379A Cited
US3748651A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-11-25 1978-05-27 1978-11-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-11-25 1982-05-27 1982-11-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-11-25 1986-05-27 1986-11-26 $7700.00 Window Closed / Lapsed

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