US3851245A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for determining whether holes in insulated layer of semiconductor substrate are fully open
Assignee: International Business Machines Corp
•
Filing: 1973-12-26
•
Granted: 1974-11-26
•
Expires: 1993-12-26
Abstract
Abstract A non-destructive test determines whether the holes in an insulated layer on a semiconductor wafer are fully open to provide communication through the insulated layer to the wafer. A conductor extends from each hole to another hole. Current is supplied to a plurality of these conductors in series to enable the resistance to be measured with the current having to flow through the surface of the wafer from the end of one conductor within the hole to the end of another conductor within the hole since the ends are spaced from each other. If any hole is not fully open, then the insulated layer prevents the flow of current to indicate by a high resistance that this portion of the wafer is not satisfactory.
Inventors
- 👤 T Baker
- 👤 R Stevens
- 👤 A Tzou
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 18:00
CPC Classifications
G; G01; G01R; G01R27/00; G01R27/02; G01R27/025; G01R31/00; G01R31/26; G01R31/2607; G01R31/2637; G01R31/2644
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
195 words
A method of determining whether each of the holes in an insulated layer on a surface of a semiconductor wafer is fully open to communicate with the surface of the wafer including: forming conductors on the insulated layer from one hole to another with one end of each of the conductors being disposed to extend to the region of the surface of the wafer with which the one hole is to communicate to make ohmic contact therewith and the other end of the conductor being disposed to extend to the region of the surface of the wafer with which the other hole is to communicate to make ohmic contact therewith so that each of the holes has the ends of two conductors extending therethrough to a region of the wafer and spaced from each other; applying a voltage acRoss a plurality of series connected conductors; and ascertaining the total resistance of the current path by the current that flows through all the series connected conductors to determine that all of the holes in the insulated layer having the ends of the conductors extending thereinto communicate with the surface of the wafer at the various regions.
Claim 2
Independent Claim
195 words
A method of determining whether each of the holes in an insulated layer on a surface of a semiconductor wafer is fully open to communicate with the surface of the wafer including: forming conductors on the insulated layer from one hole to another with one end of each of the conductors being disposed to extend to the region of the surface of the wafer with which the one hole is to communicate to make ohmic contact therewith and the other end of the conductor being disposed to extend to the region of the surface of the wafer with which the other hole is to communicate to make ohmic contact therewith so that each of the holes has the ends of two conductors extending therethrough to a region of the wafer and spaced from each other; applying a voltage acRoss a plurality of series connected conductors; and ascertaining the total resistance of the current path by the current that flows through all the series connected conductors to determine that all of the holes in the insulated layer having the ends of the conductors extending thereinto communicate with the surface of the wafer at the various regions.
Claim 3
Dependent Claim
72 words
The method according to claim 1 in which the conductors are formed by depositing a conductive material over the insulated layer and into the holes in the insulated layers and then etching portions of the conductive material to form the conductors with each of the conductors having material removed to leave a space within each of the holes between the ends of the conductors adapted to engage the region of the wafer.
Claim 4
Dependent Claim
31 words
The method according to claim 2 in which the holes provide communication to regions of the wafer forming the emitter, base, and collector of at least one transistor in the wafer.
Claim 5
Dependent Claim
12 words
The method according to claim 3 in which the wafer is silicon.
Claim 6
Dependent Claim
14 words
The method according to claim 4 including removing the conductors upon completion of testing.
Claim 7
Dependent Claim
14 words
The method according to claim 3 including removing the conductors upon completion of testing.
Claim 8
Dependent Claim
12 words
The method according to claim 2 in which the wafer is silicon.
Claim 9
Dependent Claim
12 words
The method according to claim 1 in which the wafer is silicon.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-11-25 | 1978-05-27 | 1978-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-11-25 | 1982-05-27 | 1982-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-11-25 | 1986-05-27 | 1986-11-26 | $7700.00 | Window Closed / Lapsed |