US3836906A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital-to-analog converter circuit
Assignee: Sony Corp
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Filing: 1973-02-28
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Granted: 1974-09-17
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Expires: 1993-02-28
Abstract
Abstract A circuit for converting binary-coded number signals into analog voltages. The 1 and 0 voltage levels of the binary signals are applied through individual switching means to charge separate charge storage elements, the quantity of charge being weighted according to the position of the digit in the number. The total charge is subsequently transferred to a common output charge storage element by way of separate transfer switching elements to produce a voltage that corresponds to the sum of the charge transferred and is, therefore, an analog voltage that corresponds to the binary number.
Inventors
- 👤 T Ando
- 👤 H Matsumoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 05:42
CPC Classifications
G; G11; G11C; G11C19/00; G11C19/34; G11C19/36; H; H03; H03M; H03M1/00; H03M1/12; H03M1/22
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
327 words
A digital-to-analog converter circuit comprising: N input terminals N being equal to at least two adapted to each receive an electrical signal of a respective digit of a digitally coded number; N first charge storage means each having a weighted capacity to store an electric charge; N switching elements each connected between one of said input terminals and a corresponding one of said first charge storage means; second charge storage means connected between first and second terminals and having a capacity sufficient to store the total of the electrical charges stored by said N first charge storage means; N charge transfer elements each connected between a corresponding one of said first charge storage means and said first terminal of said second charge storage means; means for applying a first series of pulses to said switching elements so as to actuate the latter during a first interval for charging each of said first charge storage means to a voltage corresponding to the digital signal applied to the respective one of said input terminals during said first interval; means for also applying said first series of pulses to said first terminal of said second charge storage means to charge the latter to a voltage which corresponds substantially to the voltage of the pulses during said first interval; means for applying to said second terminal of said second charge storage means a second series of pulses lagging behind the pulses of said first series; and means for also applying said second series pulses to said charge transfer elements for actuating the latter during a second interval which follows said first interval and during which there is transferred through the actuated charge transfer elements between said first and second charge storage means a charge corresponding to the total charge previously established on said first charge storage means for producing, at said first terminal of said second charge storage means, a voltage having an analog value corresponding to said digitally coded number.
Claim 2
Dependent Claim
327 words
A digital-to-analog converter circuit comprising: N input terminals N being equal to at least two adapted to each receive an electrical signal of a respective digit of a digitally coded number; N first charge storage means each having a weighted capacity to store an electric charge; N switching elements each connected between one of said input terminals and a corresponding one of said first charge storage means; second charge storage means connected between first and second terminals and having a capacity sufficient to store the total of the electrical charges stored by said N first charge storage means; N charge transfer elements each connected between a corresponding one of said first charge storage means and said first terminal of said second charge storage means; means for applying a first series of pulses to said switching elements so as to actuate the latter during a first interval for charging each of said first charge storage means to a voltage corresponding to the digital signal applied to the respective one of said input terminals during said first interval; means for also applying said first series of pulses to said first terminal of said second charge storage means to charge the latter to a voltage which corresponds substantially to the voltage of the pulses during said first interval; means for applying to said second terminal of said second charge storage means a second series of pulses lagging behind the pulses of said first series; and means for also applying said second series pulses to said charge transfer elements for actuating the latter during a second interval which follows said first interval and during which there is transferred through the actuated charge transfer elements between said first and second charge storage means a charge corresponding to the total charge previously established on said first charge storage means for producing, at said first terminal of said second charge storage means, a voltage having an analog value corresponding to said digitally coded number.
Claim 3
Dependent Claim
96 words
The digital-to-analog coverter of claim 1; in which each of said switching elements comprises a respective FET of a first set of FETs which receive said first series of pulses to make all of the FETs of said first set conductive simultaneously, and each of said charge transfer elements comprises a respective FET of a second set of FETs which receive said second series of pulses lagging behind the pulses of said first series to make all of the FETs of said second set conductive simultaneously after said FETs of said first set have become non-conductive.
Claim 4
Dependent Claim
45 words
The digital-to-analog circuit of claim 2, further comprising a sampling gate circuit connected to said first terminal of the second charge storage means to receive the analog voltage thereat, and means applying said second series of pulses to said gate circuit to actuate the same.
Claim 5
Dependent Claim
32 words
The digital-to-analog converter circuit of claim 1 in which each of said N first charge storage means has a storage capacity weighted in predetermined correspondence with the code of said digital-coded number.
Claim 6
Dependent Claim
29 words
The digital-to-analog converter circuit of claim 4 in which the storage capacity of said N first charge storage means is weighted according to the sequence 1, 2, 4, 8,...(2N)/2.
Claim 7
Dependent Claim
34 words
The digital-to-analog converter circuit of claim 4 in which each of said N first charge storage means comprises a capacitor having a capacitance weighted in correspondence with the code of said digitally coded number.
Claim 8
Dependent Claim
43 words
The digital-to-analog converter circuit of claim 6 in which the capacitance of said capacitors is related such that a first one of said capacitors has: a capacitance equal to (2N)/2 times the capacitance of each of the other of said capacitors in sequence.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-09-16 | 1978-03-18 | 1978-09-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-09-16 | 1982-03-18 | 1982-09-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-09-16 | 1986-03-18 | 1986-09-17 | $7700.00 | Window Closed / Lapsed |