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US3818582A Expired / Lapsed US ⏱️ 0.0 years remaining

Methods of producing field effect transistors having insulated control electrodes

Assignee: Telefunken Electronic GmbH
•
Filing: 1971-03-04
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Granted: 1974-06-25
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Expires: 1991-03-04
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Abstract

Abstract A method of producing a field effect transistor having an insulated gate electrode in which at least one surface of a semiconductor body is covered with an insulating layer, a region of the insulating layer is covered with a metal layer to form the gate electrode and contact-making windows are introduced into the insulating layer to make contact with a source and drain electrode provided in the semi-conductor body.

Inventors

  • 👤 R Kaiser

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 13:39
CPC Classifications
H; H10; H10D; H10D99/00; H10D30/00; H10D30/01; H10D30/021

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 175 words
A method for producing an insulated gate field effect transistor in a semiconductor body comprising the steps of: forming an insulating layer on one surface of the semiconductor body; opening spaced diffusion windows within the insulating layer for the diffusion of source and drain regions into the semiconductor body; diffusing source and drain regions into the semiconductor body; covering said surface of the semiconductor body with an insulating layer; applying a metal layer over the entire surface of the insulating layer including that region of the insulating layer over which the gate electrode is to be formed opening contact-making windows within the metal layer and the insulating layer for the sOurce and drain regions; and producing source and drain electrodes within the contact-making windows and a gate electrode, said step of producing including applying a second metal layer both to said metal layer and within said contact-making windows and selectively removing portions of the two metal layers which are not needed for the electrodes for producing the gate electrode and said source and drain electrodes.
Claim 2
Independent Claim 175 words
A method for producing an insulated gate field effect transistor in a semiconductor body comprising the steps of: forming an insulating layer on one surface of the semiconductor body; opening spaced diffusion windows within the insulating layer for the diffusion of source and drain regions into the semiconductor body; diffusing source and drain regions into the semiconductor body; covering said surface of the semiconductor body with an insulating layer; applying a metal layer over the entire surface of the insulating layer including that region of the insulating layer over which the gate electrode is to be formed opening contact-making windows within the metal layer and the insulating layer for the sOurce and drain regions; and producing source and drain electrodes within the contact-making windows and a gate electrode, said step of producing including applying a second metal layer both to said metal layer and within said contact-making windows and selectively removing portions of the two metal layers which are not needed for the electrodes for producing the gate electrode and said source and drain electrodes.
Claim 3
Dependent Claim 60 words
A method as claimed in claim 1, further comprising the step of: following said step of diffusing, removing at least the portion of the insulating layer in the region of the gate electrode; and wherein said step of covering the semiconductor body with an insulating layer includes replacing the removed portion of the insulating layer with a fresh insulating layer.
Claim 4
Dependent Claim 25 words
A method as claimed in claim 1, in which the metal layer is selected from the group consisting of aluminium, gold, chromium, titanium and platinum.
Claim 5
Independent Claim 210 words
A method for producing an insulated gate field effect transistor in a semiconductor body comprising the steps of: forming an insulating layer on one surface of the semiconductor body; opening spaced diffusion windows within the insulating layer for the diffusion of source and drain regions into the the semiconductor body; diffusing source and drain regions into the semiconductor body; covering said surface of the semiconductor body with an insulating layer; subsequent to the step of covering the surface of the semiconductor body with an insulating layer, applying a getter or passivating layer to the insulating layer as an intermediate layer; applying a metal layer over the entire surface of the intermediate layer including that region of the intermediate layer over which the gate electrode is to be formed; opening contact making windows within the metal layer, the intermediate layer and the insulating layer for the source and drain regions; and producing source and drain electrodes within the contact-making windows and a gate electrode, said step of producing including applying a second metal layer both to said metal layer and within said contact-making windows and selectively removing portions of the two metal layers which are not needed for said electrodes for producing the gate electrode and said source and drain electrodes.
Claim 6
Independent Claim 210 words
A method for producing an insulated gate field effect transistor in a semiconductor body comprising the steps of: forming an insulating layer on one surface of the semiconductor body; opening spaced diffusion windows within the insulating layer for the diffusion of source and drain regions into the the semiconductor body; diffusing source and drain regions into the semiconductor body; covering said surface of the semiconductor body with an insulating layer; subsequent to the step of covering the surface of the semiconductor body with an insulating layer, applying a getter or passivating layer to the insulating layer as an intermediate layer; applying a metal layer over the entire surface of the intermediate layer including that region of the intermediate layer over which the gate electrode is to be formed; opening contact making windows within the metal layer, the intermediate layer and the insulating layer for the source and drain regions; and producing source and drain electrodes within the contact-making windows and a gate electrode, said step of producing including applying a second metal layer both to said metal layer and within said contact-making windows and selectively removing portions of the two metal layers which are not needed for said electrodes for producing the gate electrode and said source and drain electrodes.
Claim 7
Dependent Claim 69 words
A method as claimed in claim 4, further comprising following said step of diffusing, removing at least the portion of the insulating layer, in the region of the gate electrode and wherein said step of covering the semiconductor body with an insulating layer includes replacing the removed portion of the insulating layer with a fresh insulating layer for the gate electrode prior to the application of said intermediate layer.
Claim 8
Dependent Claim 16 words
A method as claimed in claim 4, in which said intermediate layer consists of an oxide.
Claim 9
Dependent Claim 15 words
A method as claimed in claim 6, in which the oxide is doped silicon oxide.
Claim 10
Dependent Claim 16 words
A method as claimed in claim 4, in which said intermediate layer consists of a nitride.
Claim 11
Dependent Claim 14 words
A method as claimed in claim 8, in which the nitride is silicon nitride.

References Cited (Backward Citations)

US3475234A Cited
US3529347A Cited
US3528168A Cited
US3566518A Cited
US3514844A Cited
US3625647A Cited
US3574010A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-06-24 1977-12-24 1978-06-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-06-24 1981-12-24 1982-06-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-06-24 1985-12-24 1986-06-25 $7700.00 Window Closed / Lapsed

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