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US3818362A Expired / Lapsed US ⏱️ 0.0 years remaining

Noise reduction circuit

Assignee: Koninklijke Philips NV
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Filing: 1972-04-25
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Granted: 1974-06-18
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Expires: 1992-04-25
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Abstract

Abstract Noise reduction circuit in which the signal is applied to an adding circuit via two signal paths. The first signal path comprises a high-pass filter and an automatic gain control which is designed so that signals having an amplitude exceeding a given threshold value are strongly attenuated. The second signal path includes an all-pass filter. The gain and the phase shift in each signal path are such that corresponding signals cancel one another at the inputs of the addition circuit. The all-pass filter and the high-pass filter are selected to have transfer characteristics such that the overall transfer function has a maximum-flatness characteristic in the pass band.

Inventors

  • 👤 Sluys R Van

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 18:59
CPC Classifications
H; H03; H03G; H03G9/00; H03G9/02; H03G9/12; H03G9/18

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 231 words
Noise reduction circuit which comprises an input stage having an input means for receiving the signal to be processed and which has a first and a second output, an all-pass filter having an input coupled to the first output of the input stage and an output, a high-pass filter having an input coupled to the second output of the input stage and an output, an automatic gain control stage having an input coupled to the output of the highpass filter, an output, and a gain function which decreases above a given threshold value of a signal at said input, and an adding circuit having a first input coupled to the all-pass filter output, and a second input coupled to the output of the automatic gain control stage, whereby said adder has common signals at said inputs, said common signals which have amplitudes below the said threshold value being at least Substantially equal in amplitude and opposite in phase, said all-pass filter having means for providing a transfer function which at least substantially corresponds to the function 1 - p Tau /1 + p Tau and the highpass filter having a means for providing a transfer function which at least substantially corresponds to the function. (p Tau )3/(p Tau + 1) ((p Tau )2 + p Tau + 1) where p is the imaginary angular frequency and Tau is a time constant.
Claim 2
Dependent Claim 231 words
Noise reduction circuit which comprises an input stage having an input means for receiving the signal to be processed and which has a first and a second output, an all-pass filter having an input coupled to the first output of the input stage and an output, a high-pass filter having an input coupled to the second output of the input stage and an output, an automatic gain control stage having an input coupled to the output of the highpass filter, an output, and a gain function which decreases above a given threshold value of a signal at said input, and an adding circuit having a first input coupled to the all-pass filter output, and a second input coupled to the output of the automatic gain control stage, whereby said adder has common signals at said inputs, said common signals which have amplitudes below the said threshold value being at least Substantially equal in amplitude and opposite in phase, said all-pass filter having means for providing a transfer function which at least substantially corresponds to the function 1 - p Tau /1 + p Tau and the highpass filter having a means for providing a transfer function which at least substantially corresponds to the function. (p Tau )3/(p Tau + 1) ((p Tau )2 + p Tau + 1) where p is the imaginary angular frequency and Tau is a time constant.
Claim 3
Dependent Claim 44 words
Noise reduction circuit as claimed in claim 1, wherein the overall phase shift between the input and the output of the noise suppression circuit along the signal path which includes the all-pass filter is entirely determined by the transfer function of said all-pass filter.
Claim 4
Dependent Claim 85 words
Noise reduction circuit as claimed in claim 1 wherein said input stage and the all-pass filter together comprise a transistor having emitter, base, and collector electrodes, equal collector and emitter resistors coupled to said transistor, said base comprising said input means, a series combination of a resistor and a capacitor having a junction point and shunt coupled to said emitter and collector, said junction point comprising said output of the all-pass filter, the second output of the input stage comprising the collector of the transistor.
Claim 5
Dependent Claim 100 words
Noise reduction circuit as claimed in claim 1 wherein said automatic gain control stage having three parallel branches, whereby first and second junction points are formed, said first junction point comprising said control stage first input and said second junction point comprising said control stage output, the first and second branches each including the series combination of two diodes, which series combinations have opposed pass directions, the third branch including a resistor, and a pair of capacitors coupled between the junction points of the series-connected diodes in the first and second branches respectively and to a point of constant potential.
Claim 6
Dependent Claim 29 words
Noise reduction circuit as claimed in claim 1 wherein said high-pass filter comprises the cascade arrangement of two RC high-pass filters and of a third network provided with feedback.
Claim 7
Dependent Claim 41 words
Noise reduction circuit as claimed in claim 5, wherein said network provided with feedback comprises an RC high-pass filter, and an amplifier means of unity gain which has a high input impedance and a low output impedance for providing said feedback.
Claim 8
Dependent Claim 27 words
Noise reduction circuit as claimed in claim 1, further comprising an amplifier provided with a limiter coupled between the high-pass filter and the automatic gain control stage.
Claim 9
Dependent Claim 39 words
Noise reduction circuit as claimed in claim 5, further comprising, an amplifier having a limiter coupled between said high-pass filter and said gain control stage, said amplifier having an input impedance, one of RC sections comprising said input impedance.

References Cited (Backward Citations)

US3270213A Cited
GB1111863A Cited
GB1120541A Cited
US3631365A Cited
US3665345A Cited
US3548334A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-06-17 1977-12-17 1978-06-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-06-17 1981-12-17 1982-06-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-06-17 1985-12-17 1986-06-18 $7700.00 Window Closed / Lapsed

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