Compressors and expanders for noise reduction systems

Claim 2

A circuit arrangement having characteristics for compressing or expanding the dynamic range of an input signal having a predetermined dynamic range including a low-level portion, comprising a main signal path extending between an input point and an output point and responsive to said input signal to provide a main path signal substantially proportional to said input signal, a further path having an input connected to at least one of said input point and said output point, and an output providing a further path output signal, and means for combining said further path output signal with said main path signal so as either to boost or buck said main path signal, said further path including a filter with variable frequency response characteristics for restricting signals passing through said further path, said filter beIng constructed to present substantially all-pass characteristics when the input signal is in said low-level portion and including a branch of variable impedance whose impedance is so responsive to one or more signals in said circuit arrangement that, at signal levels higher than the levels corresponding to said low-level portion, the filter assumes characteristics for rejecting the signals in at least a portion of the mid-band portion of the frequency band occupied by said input signal.

Claim 3

A circuit arrangement according to claim 1, wherein the further path comprises two sub-paths connected in parallel and whose filters are constructed to assume high-pass and low-pass characteristics respectively at the higher signal levels.

Claim 4

A circuit arrangement according to claim 1, wherein the filter comprises at least one series branch and at least one parallel branch following said series branch and including a controlled resistance device, and a control circuit responsive to said one or more signals to control said device so as to reduce said resistance as said output rises.

Claim 5

A circuit arrangement according to claim 3, wherein the controlled resistance device is a field effect transistor.

Claim 6

A circuit arrangement according to claim 3, comprising a direct resistive series connection from the input of the further path to the said parallel branch.

Claim 7

A circuit arrangement according to claim 5, wherein the filter consists of a first reactive series branch, followed by a resistive parallel branch, followed by a second reactive series branch, followed by said parallel branch including said controlled resistance device, and a resistor in parallel with the series combination of the two reactive branches.

Claim 8

A circuit arrangement according to claim 6, wherein said two reactive branches are capacitive branches.

Claim 9

A circuit arrangement according to claim 3, wherein the filter comprises a first series branch, followed by a first parallel branch, followed by a second series branch, followed by said parallel branch including said controlled resistance device, and an amplifier of substantially unity gain connected to feed back the output of the filter to said first parallel branch, whereby the impedance presented by said first parallel branch is substantially increased when the other parallel branch is substantially non-conductive but falls progressively when said other parallel branch becomes progresssively more conductive.

Claim 10

A circuit arrangement according to claim 8, wherein the filter includes two sections in parallel and at least one parallel branch connected to the output of said amplifier of substantially unity gain, the two sections being constructed to assume high-pass and low-pass characteristics respectively at the higher signal levels.

Claim 11

In a noise reduction system comprising a first circuit arrangement having characteristics for compressing an input signal having a predetermined dynamic range including a low-level portion, and a second circuit arrangement having characteristics for expanding the compressed signal, wherein the circuit arrangements are complementary and each comprise a main signal path extending between an input point and an output point and responsive to said input signal and said compressed signal respectively to provide a corresponding main path signal substantially proportional to said input signal and said compressed signal respectively, a further path having an input connected to at least one of said input point and said output point, and an output providing a further path output signal, and means for combining said further path output signal with the corresponding main path signal, so as to boost and buck said main path signal in said first and second arrangements respectively, said further path of each said circuit arrangement including a filter with variable frequency response characteristics for restricting signals passing through the further path, the improvement wherein: said filter in each said circuit arrangement is cOnstructed to present substantially all-pass characteristics when said input signal is in said low-level portion and including a branch of variable impedance whose impedance is so responsive to one or more signals in the respective circuit arrangement that, at signal levels higher than the levels in said low-level portion, the filter assumes characteristics for rejecting the signals in at least a portion of the mid-band portion of the frequency band occupied by said input signal.

Claim 12

In a noise reduction system comprising a first circuit arrangement having characteristics for compressing an input signal having a predetermined dynamic range including a low-level portion, and a second circuit arrangement having characteristics for expanding the compressed signal, wherein the circuit arrangements are complementary and each comprise a main signal path extending between an input point and an output point and responsive to said input signal and said compressed signal respectively to provide a corresponding main path signal substantially proportional to said input signal and said compressed signal respectively, a further path having an input connected to at least one of said input point and said output point, and an output providing a further path output signal, and means for combining said further path output signal with the corresponding main path signal, so as to boost and buck said main path signal in said first and second arrangements respectively, said further path of each said circuit arrangement including a filter with variable frequency response characteristics for restricting signals passing through the further path, the improvement wherein: said filter in each said circuit arrangement is cOnstructed to present substantially all-pass characteristics when said input signal is in said low-level portion and including a branch of variable impedance whose impedance is so responsive to one or more signals in the respective circuit arrangement that, at signal levels higher than the levels in said low-level portion, the filter assumes characteristics for rejecting the signals in at least a portion of the mid-band portion of the frequency band occupied by said input signal.