Patent US3801967A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3801967A Expired / Lapsed US ⏱️ 0.0 years remaining

Monolithic bipolar transistor storage arrangement with latent bit pattern

Assignee: International Business Machines Corp
•
Filing: 1973-02-12
•
Granted: 1974-04-02
•
Expires: 1993-02-12
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A monolithic storage arrangement comprising a plurality of cross-coupled bipolar transistor bistable storage cells selectively operable both as a read-write storage and as a read-only storage. The switching nodes of each storage cell are connected to respective switching bipolar transistors which are complementary with respect to the cross-coupled transistors, the collector-base section of the switching transistors being connected in parallel with the base-emitter section of the respective cross-coupled transistors. For read-only operation, the emitter of one of the switching transistors is connected to a control line with the emitter of the other switching transistor remaining unconnected in accordance with predetermined fabrication personalization. The connected switching transistor injects current into the base of its associated cross-coupled transistor when the control line is suitably energized to place the cell into a desired read-only state. Both switching transistors are deactivated during read-write operation.

Inventors

  • 👤 H Berger
  • 👤 K Najmann
  • 👤 H Pietrass
  • 👤 S Wiedmann

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 19:00
CPC Classifications
H; H10; H10B; H10B10/00; H10B10/10; G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/41; G11C11/411; G11C11/4113; G11C17/00; G11C17/08; G11C7/00; G11C7/20; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/2865; H03K3/353; H03K3/356; H03K3/356008

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 157 words
A monolithic storage arrangement operable both as a readwrite storage and as a read-only storage, said storage arrangement comprising a pLurality of bistable storage cells, a first switching element representing a controllable asymmetry connected to one side of said cell, a corresponding but non-controllable second switching element which maintains the symmetry of the storage cell during readwrite operation connected to the other side of said cell, each said storage cell comprising a cross-coupled, bipolar transistor flipflop and each said switching element comprising a switching transistor which is complementary with respect to said flipflop transistors, the collector-base section of each said switching transistor being connected in parallel with the base-emitter section of the respective associated flipflop transistor, and a control line, the emitter of said first switching transistor being connected to said control line, said first switching transistor, when controlled via said control line, injecting a current pulse into the base of the associated flipflop transistor connected thereto.
Claim 2
Dependent Claim 157 words
A monolithic storage arrangement operable both as a readwrite storage and as a read-only storage, said storage arrangement comprising a pLurality of bistable storage cells, a first switching element representing a controllable asymmetry connected to one side of said cell, a corresponding but non-controllable second switching element which maintains the symmetry of the storage cell during readwrite operation connected to the other side of said cell, each said storage cell comprising a cross-coupled, bipolar transistor flipflop and each said switching element comprising a switching transistor which is complementary with respect to said flipflop transistors, the collector-base section of each said switching transistor being connected in parallel with the base-emitter section of the respective associated flipflop transistor, and a control line, the emitter of said first switching transistor being connected to said control line, said first switching transistor, when controlled via said control line, injecting a current pulse into the base of the associated flipflop transistor connected thereto.
Claim 3
Dependent Claim 25 words
A monolithic storage arrangement as claimed in claim 1, characterized in that a bit line of the storage arrangement is used as said control line.
Claim 4
Dependent Claim 77 words
A monolithic storage arrangement as claimed in claim 1, characterized in that said flipflop transistors are vertical transistors and that each said switching transistor is a lateral transistor comprising an additional emitter zone adjacent the base zone of a respective flipflop transistor, the base zone of said switching transistor coinciding with the emitter zone of said respective flipflop transistor, and the collector zone of said switching transistor coinciding with the base zone of said respective flipflop transistor.
Claim 5
Dependent Claim 36 words
A monolithic storage arrangement as claimed in claim 2, characterized in that said bit line is arranged over the respective associated emitter zone of said first switching transistor and is connected thereto via a conductive contact.
Claim 6
Dependent Claim 129 words
A monolithic storage arrangement comprising a plurality of cross-coupled bipolar transistor bitable flipflops, a plurality of switching bipolar transistors which are complementary with resepct to said cross-coupled transistors, the collector-base section of each said switching transistor being connected in parallel with the base-emitter section of a respective cross-coupled transistor, and a pair of control lines the emitter of one of said switching transistors per flipflop being connected to a respective one of said control lines and the emitter of the other one of said switching transistors per flipflop being unconnected to the other of said control lines in accordance with predetermined fabrication personalization, each said connected switching transistor injecting current into the base of the respective cross-coupled transistor under the control of said respective one of said control lines.
Claim 7
Dependent Claim 129 words
A monolithic storage arrangement comprising a plurality of cross-coupled bipolar transistor bitable flipflops, a plurality of switching bipolar transistors which are complementary with resepct to said cross-coupled transistors, the collector-base section of each said switching transistor being connected in parallel with the base-emitter section of a respective cross-coupled transistor, and a pair of control lines the emitter of one of said switching transistors per flipflop being connected to a respective one of said control lines and the emitter of the other one of said switching transistors per flipflop being unconnected to the other of said control lines in accordance with predetermined fabrication personalization, each said connected switching transistor injecting current into the base of the respective cross-coupled transistor under the control of said respective one of said control lines.
Claim 8
Dependent Claim 27 words
A monolithic storage arrangement as claimed in claim 5 and further including a pair of bit lines for each flipflop, said bit lines constituting said control lines.
Claim 9
Dependent Claim 74 words
A monolithic storage arrangement as claimed in claim 5 wherein said flipflop transistors are vertical transistors and each said switching transistor is a lateral transistor comprising an additional emitter zone adjacent the base zone of a respective flipflop transistor, the base zone of said switching transistor coinciding with the emitter zone of said respective flipflop transistor, and the collector zone of said switching transistor coinciding with the base zone of said respective flipflop transistor.
Claim 10
Dependent Claim 36 words
A monolithic storage arrangement as claimed in claim 6 wherein said bit lines are arranged over respective emitter zones of said first switching transistors and are selectively connected thereto in accordance with said predetermined fabrication personalization.

References Cited (Backward Citations)

US3662351A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-04-01 1977-10-01 1978-04-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-04-01 1981-10-01 1982-04-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-04-01 1985-10-01 1986-04-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag