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US3798079A Expired / Lapsed US ⏱️ 0.0 years remaining

Triple diffused high voltage transistor

Assignee: Westinghouse Electric Corp
•
Filing: 1972-06-05
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Granted: 1974-03-19
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Expires: 1992-06-05
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Abstract

Abstract A high voltage transistor with improved surge voltage capacity is formed in a silicon semiconductor body of thickness of at least 4 mils and having two opposed major surfaces and a resistivity of at least 30 ohm-centimeters. A collector region adjoins a major surface and is comprised of three portions: The first collector portion adjoins a PN junction and has a substantially uniform dopant concentration therethrough corresponding to the resistivity of the body to support a desired reverse breakdown voltage. The second collector portion adjoins the major surface and has a dopant concentration of at least 1 X 1019 atoms per cubic centimeter at said surface and a steep dopant concentration gradient to provide for good ohmic and thermal contact properties. The third collector portion is intermediate the first and second collector portions and has higher dopant concentrations than said first collector portion, but lower than said second collector portion, and has a shallower dopant concentration gradient that said second collector portion to support a reverse breakdown surge voltage through the transistor. Preferably the transistor is the PNP type made by simultaneously diffusing boron and gallium and/or aluminum into the major surface of a silicon wafer or body having a given concentration level of N-type dopant therethrough. Thus the various portions of the collector region are simultaneously formed.

Inventors

  • 👤 Kwei Chu Chang
  • 👤 S Krishna

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 22:49
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/60; H10W; H10W74/00; H10W74/10; H10W74/131; Y; Y10; Y10S; Y10S148/00; Y10S148/121; Y10S148/151; Y10S148/157

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 60 words
A transistor having improved surge voltage capabilities at set forth in claim 1 wherein said collector region is comprised of P-conductive type dopant, the second portion of said collector region is doped with boron, and the third, intermediate collector portion of said collector region is doped with at least one dopant selected from the group consisting of gallium and aluminum.
Claim 2
Independent Claim 183 words
A method of making a PN transistor having improved surge voltage capabilities comprising the sequential steps of: disposing a silicon semiconductor body having a substantially uniform P-type dopant concentration therethrough and opposed major surfaces in a diffusion furnace; diffusing through a major surface into the semiconductor body boron and at least one dopant selected from the group consisting of gallium and aluminum to form a collector region adjoining the major surface coMprised of three portions, first collector portion comprised of said uniform P-type dopant concentration, second collector portion being doped with boron, and third collector portion being doped with at least one dopant selected from the group consisting of gallium and aluminum; diffusing through the opposed major surface into the semiconductor body an N-type dopant to form a base region in said semiconductor body; diffusing through selected portions of said major surface adjoining the base region to form an emitter region in the semiconductor body adjoining said major surface; and affixing metal contacts to the semiconductor body to separately make ohmic contact with the emitter region, the base region, and the collector region.
Claim 3
Dependent Claim 33 words
The method of making a PNP transistor as set forth in claim 3 wherein: the boron and the member of said group are simultaneously diffused through at least one of the major surfaces.

References Cited (Backward Citations)

US3260624A Cited
US3513040A Cited
US3397326A Cited
US3511724A Cited
US3488235A Cited
US3615932A Cited
US3591430A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-03-18 1977-09-17 1978-03-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-03-18 1981-09-17 1982-03-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-03-18 1985-09-17 1986-03-19 $7700.00 Window Closed / Lapsed

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