Patent US3786427A successfully refreshed from Google Patents.
US3786427A
Expired / Lapsed
US
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Dynamic address translation reversed
Assignee: International Business Machines Corp
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Filing: 1971-06-29
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Granted: 1974-01-15
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Expires: 1991-06-29
Abstract
Abstract In a virtual storage system, virtual storage may be divided into segments with each segment being divided into pages and each page containing a predetermined number of bytes. A storage control system is provided including a main storage unit, a high speed buffer storage unit operating in a virtual address mode and a dynamic address translation unit for controlling virtual page address to real page address translation including an associative storage for storing a plurality of virtual page addresses and associated real page addresses. A processing unit when making a storage request to the storage control system provides a virtual address which includes a virtual page portion containing a segment and page field and a byte portion. An I/O channel when making a storage request to the storage control system provides a real address which includes a real page portion and a byte portion. The high-speed buffer contains an address storage portion for storing virtual page addresses and a corresponding data storage portion for storing blocks of data. When a processing unit makes a request to the storage control system, the virtual page portion of the virtual address is compared with the virtual page portions stored in the buffer to determine whether the buffer may be utilized for data transmission with the processing unit. When an I/O channel makes a storage request to the storage control system the real page address is compared with the real page addresses stored in the translation unit and when a comparison is achieved a virtual page address corresponding to the real page address is provided to the buffer for further determination as to whether the buffer may be utilized for data transmission with the I/O channel. The storage control system also includes logic for controlling the transfer of address and data information between the processing unit, the I/O channel, the high-speed buffer unit and the main storage unit.
Inventors
- 👤 G Schmidt
- 👤 J Schnell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 10:41
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/08; G06F12/12; G06F12/121; G06F12/128; G06F12/10; G06F12/1027; G06F12/1045; G06F12/1063
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
597 words
Apparatus for controlling the transfer of data words in a virtual storage system comprising: a main storage having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each column storing a plurality of blocks of data words, control means for input/output devices providing data word, store request and address signals, said address signal including a column address portion, a block address portion and a data word address portion, the block address portion corresponding to a real block address of a physical block location in said main storage, associative storage means storing real block address signals and associated virtual block address signals, first comparing means comparing the real block address portion of the address signal provided by said control means with said real block address signals stored in said associative storage means and producing a first match signal indicating that a virtual block address signal corresponding to the real block address signal provided by said control means is stored in said associative storage means, a buffer storage including: a data storage means having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each column storing a plurality of main storage blocks of data words, the number of blocks of data word locations in said data storage means being a submultiple of the number of blocks of data word locations in said main storage, and a block address storage means having a plurality of word locations logically arranged into a plurality of columns of word locations corresponding to said plurality of columns of blocks of data word locations in said data storage means, each word location of said block address storage means storing a virtual block address signal identifying the main storage block of data words stored in the corresponding block of data word locations of said data storage means, addressing means for said block address storage means responsive to the column address portion of the address signal provided by said control means to read out a column of virtual block address signals, second comparing means, transfer means responsive to said first match signal to transfer the virtual block address signal in said associative storage means which corresponds with said real address signal provided by said control means to said second comparing means, said second comparing means comparing said virtual block address signal transferred from said associative storage means with said column of virtual block address signals read out from said block address storage means and producing a second match signal indicating that the addressed main storage block of data word locations is accessible from said data storage means, addressing means for said data storage means responsive to said second match signal and the column address portion and data word address portion of the address signal provided by said control means to access a data word location of said data storage means, means responsive to said second match and store request signals to transfer said data word signal from said control means to the accessed data word location of said data storage means, means responsive to said storage request signal to transfer the address signal provided by said control means to access a data word location of said storage, and means responsive to said storage request signal to transfer said data word signal from said control means to the accessed data word location of said main storage So that the data word provided by said control means is concurrently stored in said data storage means and said main storage.
Claim 2
Dependent Claim
597 words
Apparatus for controlling the transfer of data words in a virtual storage system comprising: a main storage having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each column storing a plurality of blocks of data words, control means for input/output devices providing data word, store request and address signals, said address signal including a column address portion, a block address portion and a data word address portion, the block address portion corresponding to a real block address of a physical block location in said main storage, associative storage means storing real block address signals and associated virtual block address signals, first comparing means comparing the real block address portion of the address signal provided by said control means with said real block address signals stored in said associative storage means and producing a first match signal indicating that a virtual block address signal corresponding to the real block address signal provided by said control means is stored in said associative storage means, a buffer storage including: a data storage means having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each column storing a plurality of main storage blocks of data words, the number of blocks of data word locations in said data storage means being a submultiple of the number of blocks of data word locations in said main storage, and a block address storage means having a plurality of word locations logically arranged into a plurality of columns of word locations corresponding to said plurality of columns of blocks of data word locations in said data storage means, each word location of said block address storage means storing a virtual block address signal identifying the main storage block of data words stored in the corresponding block of data word locations of said data storage means, addressing means for said block address storage means responsive to the column address portion of the address signal provided by said control means to read out a column of virtual block address signals, second comparing means, transfer means responsive to said first match signal to transfer the virtual block address signal in said associative storage means which corresponds with said real address signal provided by said control means to said second comparing means, said second comparing means comparing said virtual block address signal transferred from said associative storage means with said column of virtual block address signals read out from said block address storage means and producing a second match signal indicating that the addressed main storage block of data word locations is accessible from said data storage means, addressing means for said data storage means responsive to said second match signal and the column address portion and data word address portion of the address signal provided by said control means to access a data word location of said data storage means, means responsive to said second match and store request signals to transfer said data word signal from said control means to the accessed data word location of said data storage means, means responsive to said storage request signal to transfer the address signal provided by said control means to access a data word location of said storage, and means responsive to said storage request signal to transfer said data word signal from said control means to the accessed data word location of said main storage So that the data word provided by said control means is concurrently stored in said data storage means and said main storage.
Claim 3
Dependent Claim
601 words
Apparatus for controlling the transfer of data words in a virtual storage system comprising: a main storage having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each being adapted to store a block of data words, processing means providing storage access request and address signals, control means for input/output devices providing storage access request and address signals, said address signals provided by said processing means and said control means including a column address portion, a block address portion of said address portion, the block address portion of said address signal provided by said processing means and said control means corresponding to a virtual block address and a real block address, respectively, of a physical block location in said main storage, associative storage means storing real block address signals and associative virtual block address signals, first comparing means comparing the real block address portion of the address signal provided by said control means with said real block address signals stored in said associative storage means and producing a first match signal indicating that a virtual block address signal corresponding to the real block address signal provided by said control means is stored in said associative storage means, a buffer storage including: a data storage means having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each column storing a plurality of main storage blocks of data words, the number of blocks of data word locations in said data storage means being a submultiple of the number of blocks of data word locations in said main storage, and a block address storage means having a plurality of word locations logically arranged into a plurality of columns of word locations corresponding to said plurality of columns of blocks of data word locations in said data storage means, each word location of said block address storage means storing a virtual block address signal identifying the main storage block of data words stored in the corresponding block of data word locations of said data storage means, addressing means for said block address storage means selectively responsive to the column address portion of the address signal provided by said processing means and said control means to read out a column of virtual block address signals, second comparing means, transfer means responsive to said first match signal to transfer the virtual block address signal in said associative storage means which corresponds with said real address signal provided by said control means to said second comparing means, said second comparing means selectively comparing the virtual block address signal provided by said processing means and the virtual address signal transferred from said associative storage means with said column of virtual block address signals read out from said block address storage means and producing a second match signal indicating that the addressed main storage block of data word locations is accessible from said data storage means, addressing means for said data storage means responsive to said second match signal and selectively responsive to the column address portion and data word address portion of the address signal provided by said processing means and said control means to access a data word location of said storage means, and means responsive to said second match signal and selectively responsive to said storage access request signal provided by said processing means and said control means to selectively control the transfer of a data word signal between said processing means and said control means and the accessed data word location of said data storage means.
Claim 4
Dependent Claim
601 words
Apparatus for controlling the transfer of data words in a virtual storage system comprising: a main storage having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each being adapted to store a block of data words, processing means providing storage access request and address signals, control means for input/output devices providing storage access request and address signals, said address signals provided by said processing means and said control means including a column address portion, a block address portion of said address portion, the block address portion of said address signal provided by said processing means and said control means corresponding to a virtual block address and a real block address, respectively, of a physical block location in said main storage, associative storage means storing real block address signals and associative virtual block address signals, first comparing means comparing the real block address portion of the address signal provided by said control means with said real block address signals stored in said associative storage means and producing a first match signal indicating that a virtual block address signal corresponding to the real block address signal provided by said control means is stored in said associative storage means, a buffer storage including: a data storage means having a plurality of data word locations logically arranged into a plurality of columns of blocks of data word locations each column storing a plurality of main storage blocks of data words, the number of blocks of data word locations in said data storage means being a submultiple of the number of blocks of data word locations in said main storage, and a block address storage means having a plurality of word locations logically arranged into a plurality of columns of word locations corresponding to said plurality of columns of blocks of data word locations in said data storage means, each word location of said block address storage means storing a virtual block address signal identifying the main storage block of data words stored in the corresponding block of data word locations of said data storage means, addressing means for said block address storage means selectively responsive to the column address portion of the address signal provided by said processing means and said control means to read out a column of virtual block address signals, second comparing means, transfer means responsive to said first match signal to transfer the virtual block address signal in said associative storage means which corresponds with said real address signal provided by said control means to said second comparing means, said second comparing means selectively comparing the virtual block address signal provided by said processing means and the virtual address signal transferred from said associative storage means with said column of virtual block address signals read out from said block address storage means and producing a second match signal indicating that the addressed main storage block of data word locations is accessible from said data storage means, addressing means for said data storage means responsive to said second match signal and selectively responsive to the column address portion and data word address portion of the address signal provided by said processing means and said control means to access a data word location of said storage means, and means responsive to said second match signal and selectively responsive to said storage access request signal provided by said processing means and said control means to selectively control the transfer of a data word signal between said processing means and said control means and the accessed data word location of said data storage means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-01-14 | 1977-07-16 | 1978-01-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-01-14 | 1981-07-16 | 1982-01-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-01-14 | 1985-07-16 | 1986-01-15 | $7700.00 | Window Closed / Lapsed |