← Back to Patent Explorer
US3775174A Expired / Lapsed US ⏱️ 0.0 years remaining

Film deposited circuits and devices therefor

Assignee: Energy Conversion Devices Inc
•
Filing: 1971-05-20
•
Granted: 1973-11-27
•
Expires: 1991-05-20
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method comprising depositing on an insulating base conductive materials forming the passive elements of said electrical circuit and conductors extending thereto, and depositing on said insulating base at least one layer of semiconductor material forming said semiconductor device which electrically connects with at least one of said conductors.

Inventors

  • 👤 R Neale

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:35
CPC Classifications
H; H10; H10P; H10P95/00; G; G11; G11C; G11C13/00; G11C13/0002; G11C13/0004; H10B; H10B63/00; H10B63/20; H10B63/24; H10B63/80; H10D; H10D99/00; H10W; H10W20/00; H10W20/40; H10W74/00; H10W74/40; H10N; H10N70/00; H10N70/20; H10N70/231; H10N70/801; H10N70/821; H10N70/826; Y; Y10; Y10S; Y10S438/00; Y10S438/90

Claims Analysis

Total Claims: 1
Claim 1
Independent Claim 150 words
A method of making an electrical circuit including a number of electrical impedance-forming passive circuit elements and a number of semiconductor current control devices each of which can be rendered conductive when a voltage applied thereto exceeds a given threshold voltage value, said method comprising the steps of depositing on an insulating base films of conductive material forming said impedance-forming passive elements and conductors extending thereto depositing films of insulating material over the conductor-forming portions of said deposits of conductive material on said insulting base, each of said films of insulating materials having a hole in the same, and depositing over the holes of said films of insulating material films of semiconductor material forming said semiconductor devices which semiconductor material electrically connects various ones of said conductors through said holes, wherein the impedance-forming passive circuit elements and semiconductor current control devices are interconnected to form a substantially all-film electrical circuit.

References Cited (Backward Citations)

US3271591A Cited
US3395446A Cited
US3395040A Cited
US3505572A Cited
US3377566A Cited
US3517336A Cited
US3611063A Cited
US3654531A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-11-26 1977-05-28 1977-11-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-11-26 1981-05-28 1981-11-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-11-26 1985-05-28 1985-11-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag