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Vertical deflection device

Assignee: Panasonic Holdings Corp
•
Filing: 1970-11-30
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Granted: 1973-11-20
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Expires: 1990-11-30
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Abstract

Abstract A vertical deflection device in which an output terminal of a single-ended push-pull circuit is connected with a deflection coil and a closed circuit is formed in which said deflection coil is included but not a transistor which constitutes said singleended push-pull circuit during a blanking period, thereby to cause a free oscillation in said closed circuit with small attenuating resistance.

Inventors

  • 👤 N Yasumatsuya

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 23:38
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/60; H03K4/69; H03K4/71; H03K4/693; H03K4/696; H03K4/72; H03K4/725

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 115 words
A vertical deflection device, comprising: a single-ended push-pull circuit including: first and second transistors, and a first diode connected in series with said transistors and caused to conduct during a scanning period; a deflection coil connected in parallel with said first transistor, said coil generating pulse voltages during at least a part of a blanking period to cut off said first diode; a capacitor connected in parallel with said first diode; a second diode coupled across the collector - emitter circuit of said second transistor; and means supplying said second diode with a reverse bias voltage during said scanning period and a forward bias voltage during the period when said first diode is cut off.
Claim 2
Dependent Claim 115 words
A vertical deflection device, comprising: a single-ended push-pull circuit including: first and second transistors, and a first diode connected in series with said transistors and caused to conduct during a scanning period; a deflection coil connected in parallel with said first transistor, said coil generating pulse voltages during at least a part of a blanking period to cut off said first diode; a capacitor connected in parallel with said first diode; a second diode coupled across the collector - emitter circuit of said second transistor; and means supplying said second diode with a reverse bias voltage during said scanning period and a forward bias voltage during the period when said first diode is cut off.
Claim 3
Dependent Claim 90 words
A vertical deflection device according to claim 1, in which the collector of the second transistor is connected with a power supply through said parallel circuit including said first diode and said capacitor, the base of the second transistor being connected with said power supply through a bias circuit having a parallel circuit including a third diode and a second capacitor, said third diode being biased in the forward direction during said scanning period and in the reverse direction during the period in which the first diode is cut off.
Claim 4
Dependent Claim 74 words
A vertical deflection device according to claim 1, in which the collector of the second transistor and a base bias circuit is connected with a power supply through said first diode common to the collector of the second transistor and said base bias circuit, said first diode being supplied with a forward bias voltage during the scanning period and a reverse bias voltage during the period in which the first diode is cut off.

References Cited (Backward Citations)

US3111603A Cited
US3343006A Cited
US3392302A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-11-19 1977-05-21 1977-11-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-11-19 1981-05-21 1981-11-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-11-19 1985-05-21 1985-11-20 $7700.00 Window Closed / Lapsed

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