Field time-base circuit arrangement

Claim 1

A TIME BASE CIRCUIT COMPRISING A FIRST SERIES CIRCUIT OF A FIRST RESISTOR AND FIRST CAPACITOR, A SECOND SERIES CIRCUIT OF A BREAKDOWN DEVICE AND A SECOND RESISTOR, SAID BREAKDOWN DEVICE BEING OF THE TYPE HAVING A CONSTANT BREAKDOWN VOLTAGE, MEANS CONNECTING SAID SECOND SERIES CIRCUIT IN PARALLEL WITH SAID FIRST CAPACITOR, A SOURCE CIRCUIT OF A THIRD RESISTOR AND A SECOND CAPACITOR, A SOURCE OF OPERATING POTENTIAL CONNECTED TO SAID THIRD SERIES CIRCUIT WHEREBY SAID SECOND CAPACITOR CHARGES THROUGH SAID THIRD RESISTOR, MEANS CONNECTED IN PARALLEL WITH SAID SECOND CAPACITOR FOR PERIODICALLY DISCHARGING SAID SECOND CAPACITOR, MEANS CONNECTING SAID FIRST SERIES CIRCUIT IN PARALLEL WITH SAID SECOND CAPACITOR, SAID FIRST SERIES CIRCUIT HAVING A TIME CONSTANT WITH RESPECT TO THE TIME CONSTANT OF THE THIRD SERIES CIRCUIT AND THE BREAKDOWN VOLTAGE OF THE BREAKDOWN DEVICE THAT VOLTAGE ACROSS SAID FIRST CAPACITOR ATTAINS SAID BREAKDWON VOLTAGE AND SAID FIRST CAPACITOR IS DISCHARGED A PLURALITY OF TIMES FOR EACH DISCHARGE OF SAID SECOND CAPACITOR, WHEREBY A SERIES OF VOLTAGE PULSES HAVING A REPETITION PERIOD DEPENDENT UPON THE INSTANTANEOUS AMPLITUDE OF THE VOLTAGE ACROSS SAID SECOND CAPACITOR IS PRODUCED ACROSS SAID SECOND RESISTOR, AND AN OUTPUT CIRCUIT CONNECTED TO SAID SECOND RESISTOR.