← Back to Patent Explorer
US3760280A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for delaying an electrical signal

Assignee: Acoustic Systems Inc
•
Filing: 1972-06-07
•
Granted: 1973-09-18
•
Expires: 1992-06-07
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A system for actively delaying an electrial signal. The electrical signal to be delayed is converted into a frequency modulated signal. This FM signal is coupled to a digital memory device operating responsive to a control signal. The rate of the control signal and the physical capacity of the memory device determine the delay of the FM signal. The delayed FM signal is demodulated back into its original format. This abstract is neither intended to define the invention of the application which, of course, is measured by the claims, nor is it intended to be limiting as to the scope of the invention in any way.

Inventors

  • 👤 M Covington

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 06:57
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/04; H; H03; H03K; H03K5/00; H03K5/13; H03K5/135

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 160 words
A method for delaying an analog electrical signal including the steps of: converting said analog electrical signal into a frequency modulated electrical signal having frequency responsive to a preselected parameter of said analog electrical signal; supplying a control signal comprised of a train of pulses occurring at a preselected rate, the rate of occurrence of said pulses comprising said control signal being at least twice the highest frequency of said frequency modulated electrical signal; receiving each cycle at the input of a storage means having a preselected number of discrete storage units; shifting each cycle from storage unit to storage unit through said storage means, the shifting operations occurring responsive to the pulses comprising said control signal; emitting each cycle once it has shifted completely through said digital storage means; and converting said delayed frequency modulated signal into an analog electrical signal having said preselected one of its parameters responsive to the frequency of said delayed frequency modulated electrical signal.
Claim 2
Independent Claim 160 words
A method for delaying an analog electrical signal including the steps of: converting said analog electrical signal into a frequency modulated electrical signal having frequency responsive to a preselected parameter of said analog electrical signal; supplying a control signal comprised of a train of pulses occurring at a preselected rate, the rate of occurrence of said pulses comprising said control signal being at least twice the highest frequency of said frequency modulated electrical signal; receiving each cycle at the input of a storage means having a preselected number of discrete storage units; shifting each cycle from storage unit to storage unit through said storage means, the shifting operations occurring responsive to the pulses comprising said control signal; emitting each cycle once it has shifted completely through said digital storage means; and converting said delayed frequency modulated signal into an analog electrical signal having said preselected one of its parameters responsive to the frequency of said delayed frequency modulated electrical signal.
Claim 3
Dependent Claim 35 words
A method for delaying an analog electrical signal according to claim 1 wherein said rate of occurrence of said control signal is at least 10 times the highest frequency of said frequency modulated electrical signal.
Claim 4
Independent Claim 159 words
An apparatus for delaying an analog electrical signal, comprising: circuit means for converting said analog electrical signal into a frequency modulated electrical signal having frequency responsive to a preselected parameter of said analog electrical signal; circuit means for supplying a control signal comprised of a train of pulses occurring at a preselected rate, said rate of occurrence of said control signal being at least twice the highest frequency of said frequency modulated electrical signal, circuit means coupled to the outputs of said converting circuit means and said control signal circuit means for delaying each cycle of said frequency modulated electrical signal for a preselected time period determined in part by said control signal; and circuit means coupled to the output of said storage means for converting the delayed frequency modulated electrical signal emitted by said storage means into an analog electrical signal having said preselected one of its parameters responsive to the frequency of said delayed frequency modulated signal.
Claim 5
Independent Claim 159 words
An apparatus for delaying an analog electrical signal, comprising: circuit means for converting said analog electrical signal into a frequency modulated electrical signal having frequency responsive to a preselected parameter of said analog electrical signal; circuit means for supplying a control signal comprised of a train of pulses occurring at a preselected rate, said rate of occurrence of said control signal being at least twice the highest frequency of said frequency modulated electrical signal, circuit means coupled to the outputs of said converting circuit means and said control signal circuit means for delaying each cycle of said frequency modulated electrical signal for a preselected time period determined in part by said control signal; and circuit means coupled to the output of said storage means for converting the delayed frequency modulated electrical signal emitted by said storage means into an analog electrical signal having said preselected one of its parameters responsive to the frequency of said delayed frequency modulated signal.
Claim 6
Dependent Claim 51 words
An apparatus for delaying an analog electrical signal according to claim 4 wherein said delaying circuitry comprises a storage means having a preselected number of discrete storage units, each of said cycles being shifted from storage unit to storage unit through said circuitry reqponsive to the pulses comprising said control signal.
Claim 7
Dependent Claim 38 words
An apparatus for delaying an analog electrical signal according to claim 4 wherein said rate of occurrence of the pulses comprising said control signal is at least 10 times the highest frequency of said frequency modulated electrical signal.
Claim 8
Independent Claim 176 words
An apparatus for delaying an analog electrical signal, comprising: a voltage controlled oscillator for converting said analog electrical signal into a frequency modulated signal having frequency responsive to a preselected one of the parameters of said analog electrical signal; a clock for generating a signal comprised of a plurality of discrete pulses occurring at a preselected rate, said rate of occurrence being at least twice the highest frequency of said frequency modulated signal; a shift register coupled to the outputs of said voltage controlled oscillator and said clock for storing and shifting the individual cycles of said freqeuncy modulated signal, the shifting operations of said shift register occurring responsive to the pulses comprising said clock signal, each cycle of said frequency modulated signal being emitted by said shift register after it has shifted completely therethrough; and a demodulator coupled to the output of said shift register for converting said delayed frequency modulated signal into an analog electrical signal having said preselected one of its parameters responsive to the frequency of the delayed frequency modulated electrical signal.
Claim 9
Independent Claim 176 words
An apparatus for delaying an analog electrical signal, comprising: a voltage controlled oscillator for converting said analog electrical signal into a frequency modulated signal having frequency responsive to a preselected one of the parameters of said analog electrical signal; a clock for generating a signal comprised of a plurality of discrete pulses occurring at a preselected rate, said rate of occurrence being at least twice the highest frequency of said frequency modulated signal; a shift register coupled to the outputs of said voltage controlled oscillator and said clock for storing and shifting the individual cycles of said freqeuncy modulated signal, the shifting operations of said shift register occurring responsive to the pulses comprising said clock signal, each cycle of said frequency modulated signal being emitted by said shift register after it has shifted completely therethrough; and a demodulator coupled to the output of said shift register for converting said delayed frequency modulated signal into an analog electrical signal having said preselected one of its parameters responsive to the frequency of the delayed frequency modulated electrical signal.
Claim 10
Dependent Claim 38 words
An apparatus for delaying an analog electrical signal according to claim 6 wherein said rate of occurrence of the pulses emitted by the clock is at least 10 times the highest frequency of said frequency modulated electrical signal.

References Cited (Backward Citations)

US3105939A Cited
US3206686A Cited
US3582797A Cited
US3562670A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-09-17 1977-03-19 1977-09-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-09-17 1981-03-19 1981-09-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-09-17 1985-03-19 1985-09-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag