← Back to Patent Explorer
US3105939A Expired / Lapsed US ⏱️ 0.0 years remaining

Precision time delay generator

Assignee: CMC Electronics Inc
•
Filing: 1960-07-21
•
Granted: 1963-10-01
•
Expires: 1980-07-21
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

No abstract record available.

Inventors

  • 👤 Onno Peter
  • 👤 John F Haberl

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 22:49
CPC Classifications
G; G04; G04F; G04F5/00; H; H03; H03K; H03K17/00; H03K17/28

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 195 words
A TIME DELAY CIRCUIT COMPRISING, IN COMBINATION, A RESISTANCE CAPACITY NETWORK HAVING FIRST AND SECOND TERMINALS AND CONSTITUTED OF A FIRST BRANCH COMPRISING A FIRST RESISTANCE OF VALUE R1 AND A FIRST CAPACITANCE OF VALUE C1 SERIALLY CONNECTED IN THAT ORDER BETWEEN SAID FIRST AND SECOND TERMINALS, A SECOND BRANCH COMPRISING A SECOND CAPACITANCE OF VALUE C2 AND A SECOND RESISTANCE OF VALUE R2 SERIALLY CONNECTED IN THAT ORDER BETWEEN SAID FIRST AND SECOND TERMINALS, A THIRD RESISTANCE OF VALUE R3 CONNECTED IN PARALLEL WITH C2, THE VALUES C2, R2 AND R3 BEING SUCH AS TO SATISFY THE RELATIONS C2R2=2R1C1, AND R3=3R2: A VOLTAGE COMPARATOR HAVING FIRST AND SECOND INPUTS; MEANS CONNECTING THE FIRST INPUT OF SAID VOLTAGE COMPARATOR BETWEEN SAID SECOND TERMINAL AND THE JUNCTION OF SAID FIRST RESISTANCE AND SAID FIRST CAPACITANCE; MEANS CONNECTING THE SECOND INPUT OF SAID VOLTAGE COMPARATOR BETWEEN SAID SECOND TERMINAL AND A POINT ON SAID SECOND RESISTANCE; A LOW IMPEDANCE WAVEFORM GENERATOR PROVIDING A VOLTAGE WAVE HAVING A STEPPED WAVEFRONT FOLLOWED BY A SUBSTANTIALLY FLAT PORTION; MEANS TO APPLY THE OUTPUT OF SAID GENERATOR BETWEEN SAID FIRST AND SECOND TERMINALS; AND UTILIZATION MEANS FED FROM SAID VOLTAGE COMPARATOR.
Claim 2
Dependent Claim 195 words
A TIME DELAY CIRCUIT COMPRISING, IN COMBINATION, A RESISTANCE CAPACITY NETWORK HAVING FIRST AND SECOND TERMINALS AND CONSTITUTED OF A FIRST BRANCH COMPRISING A FIRST RESISTANCE OF VALUE R1 AND A FIRST CAPACITANCE OF VALUE C1 SERIALLY CONNECTED IN THAT ORDER BETWEEN SAID FIRST AND SECOND TERMINALS, A SECOND BRANCH COMPRISING A SECOND CAPACITANCE OF VALUE C2 AND A SECOND RESISTANCE OF VALUE R2 SERIALLY CONNECTED IN THAT ORDER BETWEEN SAID FIRST AND SECOND TERMINALS, A THIRD RESISTANCE OF VALUE R3 CONNECTED IN PARALLEL WITH C2, THE VALUES C2, R2 AND R3 BEING SUCH AS TO SATISFY THE RELATIONS C2R2=2R1C1, AND R3=3R2: A VOLTAGE COMPARATOR HAVING FIRST AND SECOND INPUTS; MEANS CONNECTING THE FIRST INPUT OF SAID VOLTAGE COMPARATOR BETWEEN SAID SECOND TERMINAL AND THE JUNCTION OF SAID FIRST RESISTANCE AND SAID FIRST CAPACITANCE; MEANS CONNECTING THE SECOND INPUT OF SAID VOLTAGE COMPARATOR BETWEEN SAID SECOND TERMINAL AND A POINT ON SAID SECOND RESISTANCE; A LOW IMPEDANCE WAVEFORM GENERATOR PROVIDING A VOLTAGE WAVE HAVING A STEPPED WAVEFRONT FOLLOWED BY A SUBSTANTIALLY FLAT PORTION; MEANS TO APPLY THE OUTPUT OF SAID GENERATOR BETWEEN SAID FIRST AND SECOND TERMINALS; AND UTILIZATION MEANS FED FROM SAID VOLTAGE COMPARATOR.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1966-09-30 1967-04-01 1967-10-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1970-09-30 1971-04-01 1971-10-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1974-09-30 1975-04-01 1975-10-01 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag