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US3758943A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing semiconductor device

Assignee: Toshiba Corp
•
Filing: 1971-11-18
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Granted: 1973-09-18
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Expires: 1991-11-18
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Abstract

Abstract A method for manufacturing a semiconductor device comprises forming a first region of one conductivity type in a substrate of an opposite conductivity type through a main surface of the substrate, depositing a first metal electrode layer on the first region and depositing an insulation film on the first electrode layer. The insulation film is etched over the first region with a plurality of relatively minute holes to expose the first metal electrode layer through the holes and the first metal electrode layer is etched with a plurality of holes to expose the first region through said holes, the holes in the first metal electrode layer being etched such that the holes of the first metal electrode layer are larger than that of the insulation film. A second region is formed in the first region through the holes of the first metal electrode layer and insulation film. The second region is of opposite conductivity to the first region. A second metal electrode layer is formed on the insulation film so as to electrically connected to each exposed section of the second region through the holes of the first metal electrode layer and insulation film.

Inventors

  • 👤 K Shibata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 03:17
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D99/00; H10P; H10P95/00; Y; Y10; Y10S; Y10S438/00; Y10S438/914; Y10S438/942; Y10S438/944

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 90 words
A method as defined in claim 1 wherein the perforation of holes in said first metal electrode layer and insulation film comprises the steps of: first, perforating said insulation film using an etching liquid in which said insulation film is soluble, but said first metal electrode layer is difficultly soluble; and then perforating said first metal electrode layer with holes in registration with those already formed in said insulation film, using an etching liquid in which said first metal electrode layer is soluble but said insulation film is difficultly soluble.
Claim 2
Independent Claim 214 words
A method for manufacturing a semiconductor device comprising the steps of: forming a first region of one conductivity type in a substrate having an opposite conductivity type to said first region through a main surface of said substrate; vapor depositing a first metal electrode layer at least one said first region; depositing an insulation film on said first electrode layer; etching said insulation film over said first region with a plurality of relatively minute holes to expose said first metal electrode layer through said holes; etching said first metal electrode layer with a plurality of holes to expose said first region through said holes of said insulation film and said etched holes of said insulation film and said etched holes of said first metal electrode layer such that said holes of said first metal electrode layer become larger than that of said insulation film; forming by ion implantation in said first region a second region having an opposite conductivity type to said first region through said holes of said first metal electrode layer and insulation film; and vapor depositing a second metal electrode layer on said insulation film so as to electrically connect it to each exposed section of said second region through said holes of said first metal electrode layer and insulation film.
Claim 3
Dependent Claim 90 words
A method as defined in claim 3 wherein the perforation of holes in said first metal electrode layer and insulation film comprises the steps of: first, perforating said insulation film using an etching liquid in which said insulation film is soluble, but said first metal electrode layer is difficultly soluble; and then perforating said first metal electrode layer with holes in registration with those already formed in said insulation film, using an etching liquid in which said first metal electrode layer is soluble but said insulation film is difficultly soluble.

References Cited (Backward Citations)

US3237271A Cited
US3567506A Cited
US3635767A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-09-17 1977-03-19 1977-09-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-09-17 1981-03-19 1981-09-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-09-17 1985-03-19 1985-09-18 $7700.00 Window Closed / Lapsed

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