Patent US3755721A successfully refreshed from Google Patents.
US3755721A
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US
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Floating gate solid state storage device and method for charging and discharging same
Assignee: Intel Corp
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Filing: 1971-01-15
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Granted: 1973-08-28
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Expires: 1991-01-15
Abstract
Abstract A floating gate solid state storage device comprising a floating silicon or metal gate in a field effect device which is particularly useful in integrated circuit devices such as a readonly memory is disclosed. The gate which is surrounded by an insulative material such as SiO2 is charged by transferring charged particles (i.e., electrons) at relatively low voltages (e.g., less than approximately 50 volts) across a thick insulation layer (e.g., greater than approximately 500 angstroms) from the substrate during an avalanche injection condition.
Inventors
- 👤 Bentchkowsky D Frohman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:47
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/686; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10D84/406; H10D99/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
13 words
The device defined in claim 1 wherein said substrate comprises a silicon material.
Claim 2
Dependent Claim
14 words
The device defined in claim 2 wherein said insulative means comprises a silicon oxide.
Claim 3
Dependent Claim
11 words
The device defined in claim 3 wherein said gate comprises silicon.
Claim 4
Dependent Claim
11 words
The device defined in claim 3 wherein said gate comprises aluminum.
Claim 5
Dependent Claim
13 words
The device defined in claim 4 wherein said first conductivity type is n-type.
Claim 6
Dependent Claim
50 words
The device defined in claim 1 including a fourth region in said substrate having the same conductivity type as said substrate and forming part of the collector of said bipolar transistor, said first region forming the base of said transistor and the third region forming the emitter of said transistor.
Claim 7
Dependent Claim
114 words
A programmable memory device comprising: a substrate of a first conductivity type; a pair of spaced apart regions of a second conductivity type disposed in said substrate, said spaced apart regions defining a channel; a floating gate disposed above said channel said gate overlapping one of said regions more than the other of said regions; insulation means for insulating said floating gate from said substrate, regions and channel; means for applying a voltage to at least one of said spaced apart regions and said substrate of sufficient magnitude to cause an avalanche injection, thereby causing electrons to pass through said insulation means onto said floating gate whereby said floating gate may be electrically charged.
Claim 8
Dependent Claim
13 words
The device defined in claim 8 wherein said substrate is a P-type silicon.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-08-27 | 1977-02-26 | 1977-08-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-08-27 | 1981-02-26 | 1981-08-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-08-27 | 1985-02-26 | 1985-08-28 | $7700.00 | Window Closed / Lapsed |