Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
77 words
A process for removing excess solder from contact elements to which a semiconductor chip is to be bonded, comprising: A. depositing a layeR of solderable metal on a member essentially duplicating the heat transfer characteristics of the chip, B. contacting the excess solder with the solderable metal layer, C. heating the excess solder to reflow temperature in a heat cycle within limits established for preventing damage to adjacent chips, and D. removing the member simulating the chip.
Claim 2
Dependent Claim
77 words
A process for removing excess solder from contact elements to which a semiconductor chip is to be bonded, comprising: A. depositing a layeR of solderable metal on a member essentially duplicating the heat transfer characteristics of the chip, B. contacting the excess solder with the solderable metal layer, C. heating the excess solder to reflow temperature in a heat cycle within limits established for preventing damage to adjacent chips, and D. removing the member simulating the chip.
Claim 3
Dependent Claim
25 words
The process of claim 1 in which the chip is an integrated circuit silicon chip and the member simulating the chip is silicon or titanium.
Claim 4
Dependent Claim
8 words
contacting the excess solder with the solderable metal,
Claim 5
Dependent Claim
8 words
contacting the excess solder with the solderable metal,
Claim 6
Dependent Claim
21 words
heating the excess solder to reflow temperature in a heat cycle within limits necessary to prevent damage to adjacent chips, and
Claim 7
Dependent Claim
21 words
heating the excess solder to reflow temperature in a heat cycle within limits necessary to prevent damage to adjacent chips, and
Claim 8
Dependent Claim
15 words
The process of claim 2 in which the solderable metal is copper overlaid with gold.
Claim 9
Dependent Claim
20 words
The process of claim 3 in which the copper is deposited by sputtering and the gold is deposited by plating.
Claim 10
Dependent Claim
17 words
removing the member simulating the chip, and E. replacing the removed chip with another integrated circuit chip.
Claim 11
Dependent Claim
17 words
removing the member simulating the chip, and E. replacing the removed chip with another integrated circuit chip.
Claim 12
Dependent Claim
16 words
The process of claim 3 in which the copper and gold are applied by vacuum evaporation.
Claim 13
Dependent Claim
27 words
The process of claim 1 in which the heat cycle supplies an amount of heat insufficient to cause reflow of solder bonds of an adjacent semiconductor chip.
Claim 14
Dependent Claim
66 words
A process for packaging integrated circuit chips on a substrate, comprising: A. solder reflow bonding the chips to contact elements on the substrate, B. testing the integrated circuit chips on the substrate, C. reflowing the solder bonds of a chip not performing in accordance with the test specifications and removing it, D. removing excess solder from contact elements from which the chip has been removed by:
Claim 15
Dependent Claim
66 words
A process for packaging integrated circuit chips on a substrate, comprising: A. solder reflow bonding the chips to contact elements on the substrate, B. testing the integrated circuit chips on the substrate, C. reflowing the solder bonds of a chip not performing in accordance with the test specifications and removing it, D. removing excess solder from contact elements from which the chip has been removed by:
Claim 16
Dependent Claim
23 words
The process of claim 7 in which the integrated circuit chips are silicon, and the member simulating a chip is silicon or titanium.
Claim 17
Dependent Claim
15 words
The process of claim 8 in which the solderable metal is copper overlaid with gold.
Claim 18
Dependent Claim
61 words
The process of claim 7 in which heat cycles used in solder reflow removal of a chip not performing in accordance with test specifications, in removal of the excess solder, and in replacement of the removed chip with another integrated circuit chip all supply an amount of heat insufficient to cause reflow of solder bonds of an adjacent integrated circuit chip.