US3751647A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor and integrated circuit device yield modeling
Assignee: International Business Machines Corp
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Filing: 1971-09-22
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Granted: 1973-08-07
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Expires: 1991-09-22
Abstract
Abstract Yield modeling for an integrated circuit manufacturing process utilizes the number of defects for each chip, rather than average defect density, in the prediction model. An overall predicted yield is obtained from individual yields calculated for regions of approximately homogenous yield within the region. By using this approach, and preferably utilizing actual yield data and defect information from previously produced devices as well, in generating the yield model, sufficiently accurate yield predictions are obtained to allow the predictions to be used to identify critical yield detracting operations in the manufacturing process. These critical detracting operations may then be changed to decrease the number of defects produced by them.
Inventors
- 👤 R Maeder
- 👤 F Oster
- 👤 R Soderman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 23:36
CPC Classifications
H; H10; H10D; H10D89/00
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
111 words
In a process for the manufacture of semiconductor devices as an array on a wafer, the improvement comprising: A. evaluating the likelihood that a defect of a given type will produce a defective device in the process, B. inspecting at least representative samples of the devices for the defects by process step to determine the actual number of the defects for each device, C. determining, on the basis of the actual number of defects for each device and the likelihood of each defect causing a defective device,critical yield detracting operations in said manufacturing process, and D. changing the critical yield detracting operations to decrease the number of defects produced by them.
Claim 2
Dependent Claim
111 words
In a process for the manufacture of semiconductor devices as an array on a wafer, the improvement comprising: A. evaluating the likelihood that a defect of a given type will produce a defective device in the process, B. inspecting at least representative samples of the devices for the defects by process step to determine the actual number of the defects for each device, C. determining, on the basis of the actual number of defects for each device and the likelihood of each defect causing a defective device,critical yield detracting operations in said manufacturing process, and D. changing the critical yield detracting operations to decrease the number of defects produced by them.
Claim 3
Dependent Claim
35 words
The process of claim 1 in which the array is divided into regions of approximately homogenous yield, and the critical yield detracting operations are determined for each region on the basis of its defect data.
Claim 4
Dependent Claim
13 words
The process of claim 2 in which the semiconductor devices are integrated circuits.
Claim 5
Dependent Claim
130 words
In a process for the manufacture of integrated circuits on a wafer, the improvement comprising: A. characterizing defects which cause failure of the circuits, B. evaluating the likelihood that a defect of a given type will produce a defective device in the process, C. establishing criteria for in process inspection for each characterized defect type, D. inspecting at least representative samples of the circuits for the defects by process step to determine the actual number of the defects for each circuit, E. determining, on the basis of the actual number of defects for each circuit and the likelihood of each defect causing a defective circuit, critical yield detracting operations in said manufacturing process and F. changing the critical yield detracting operations to decrease the number of defects produced by them.
Claim 6
Dependent Claim
130 words
In a process for the manufacture of integrated circuits on a wafer, the improvement comprising: A. characterizing defects which cause failure of the circuits, B. evaluating the likelihood that a defect of a given type will produce a defective device in the process, C. establishing criteria for in process inspection for each characterized defect type, D. inspecting at least representative samples of the circuits for the defects by process step to determine the actual number of the defects for each circuit, E. determining, on the basis of the actual number of defects for each circuit and the likelihood of each defect causing a defective circuit, critical yield detracting operations in said manufacturing process and F. changing the critical yield detracting operations to decrease the number of defects produced by them.
Claim 7
Dependent Claim
50 words
The process of claim 4 additionally comprising the step of: G. periodically checking actual circuits produced to check the continued applicability of the characterized defects as significant yield detracting and the accuracy of the determination of the likelihood that a defect of a given type will produce a defective circuit.
Claim 8
Dependent Claim
50 words
The process of claim 4 additionally comprising the step of: H. predicting, on the basis of the number of defects for each circuit and the likelihood of each defect causing a defective device, a yield of non-defective circuits that will be achieved by the particular run of said manufacturing process.
Claim 9
Dependent Claim
33 words
The process of claim 6 in which said yield is predicted on the basis of the defect data for each process step at the time the particular run passed through that process step.
Claim 10
Dependent Claim
40 words
The process of claim 7 in which a yield prediction is made on the basis of the defect data obtained for each process step at a particular time, as a diagnostic measure of the entire process at the particular time.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-08-06 | 1977-02-05 | 1977-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-08-06 | 1981-02-05 | 1981-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-08-06 | 1985-02-05 | 1985-08-07 | $7700.00 | Window Closed / Lapsed |