Patent US3740587A successfully refreshed from Google Patents.
US3740587A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Solid state unipole relay
Assignee: General Electric Co
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Filing: 1971-09-20
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Granted: 1973-06-19
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Expires: 1991-09-20
Abstract
Abstract A solid state unipole relay, preferably for use in a modular system for providing solid state power control, comprising two discrete elements employable in different combinations to form a multipole relay with convertible contact functions and including a circuit which supplies two discrete output terminals with a train of pulses to enable gating of a Triac or Triacs associated with that particular output terminal, and wherein the operation of the circuit is such that during normal operation a train of pulses is applied to one output terminal which is connected, in turn, to an associated gate circuit of one or more Triacs but when a control signal is applied to an appropriate point within the circuit the first train of pulses is inhibited and a second train of pulses, fed to a second output terminal, is actuated to control the associated gate circuit of one or more Triacs that are independent of the first mentioned Triac or Triacs.
Inventors
- 👤 A Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:07
CPC Classifications
H; H02; H02M; H02M5/00; H02M5/02; H02M5/04; H02M5/22; H02M5/25; H02M5/257; H02M5/2573; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/72; H03K17/722; H03K17/723; H03K17/725
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
542 words
A solid state unipole relay comprising: a. a first unit having at least first, second and third output terminals, and a control voltage input terminal for receiving a control voltage input signal; b. said first unit further including pulse generating means for generating a first train of output pulses and a second train of output pulses, and latching means electrically connected to said pulse generating means; c. said pulse generating means including a first transistor having an ON and an OFF condition, a first pair of solid state electronic devices each having an ON and an OFF condition, a second pair of solid state electronic devices each having an ON and an OFF condition, and circuit means interconnecting said first transistor and said first and second pairs of solid state electronic devices in circuit; d. said pulse generating means having a first state of operation wherein said first transistor is in said OFF condition, one of said first pair of solid state electronic devices is in said OFF condition, and the other of said first pair of solid state electronic deviCes is switching between said OFF and said ON condition such that said first train of output pulses is supplied from said other of said first pair of solid state electronic devices between said first and third output terminals; e. said pulse generating means having a second state of operation wherein said first transistor is in said ON condition, one of said second pair of solid state electronic devices is in said OFF condition, and the other of said second pair of solid state electronic devices is switching between said OFF and said ON condition such that said second train of output pulses is supplied from said other of said second pair of solid state electronic devices between said second and third output terminals; f. said pulse generating means changing from said first state of operation wherein said first train of output pulses is supplied to said first output terminal to said second state of operation wherein said second train of output pulses is supplied to said second output terminal in response to said control voltage input signal being applied to said control voltage input terminal to cause said first transistor to go from said OFF condition to said ON condition and energize said relay, whereby said latching means holds said relay in the energized condition after said control voltage signal is extinguished; and g. at least one discrete second unit having a solid state electronic switching device, said switch device having an ON and an OFF condition, said second unit alternately electrically connectable between said first and third terminals of said first unit for receiving said first train of pulses and said second and third terminals of said first unit for receiving said second train of pulses, whereby when said second unit is electrically connected to said first and third terminals said switching device is in the ON condition until said relay is energized and said relay is connected in a normally closed mode, and when said second unit is electrically connected to said second and third terminals said switching device is in said OFF condition until said relay is energized and said relay is connected in a normally open mode.
Claim 2
Dependent Claim
542 words
A solid state unipole relay comprising: a. a first unit having at least first, second and third output terminals, and a control voltage input terminal for receiving a control voltage input signal; b. said first unit further including pulse generating means for generating a first train of output pulses and a second train of output pulses, and latching means electrically connected to said pulse generating means; c. said pulse generating means including a first transistor having an ON and an OFF condition, a first pair of solid state electronic devices each having an ON and an OFF condition, a second pair of solid state electronic devices each having an ON and an OFF condition, and circuit means interconnecting said first transistor and said first and second pairs of solid state electronic devices in circuit; d. said pulse generating means having a first state of operation wherein said first transistor is in said OFF condition, one of said first pair of solid state electronic devices is in said OFF condition, and the other of said first pair of solid state electronic deviCes is switching between said OFF and said ON condition such that said first train of output pulses is supplied from said other of said first pair of solid state electronic devices between said first and third output terminals; e. said pulse generating means having a second state of operation wherein said first transistor is in said ON condition, one of said second pair of solid state electronic devices is in said OFF condition, and the other of said second pair of solid state electronic devices is switching between said OFF and said ON condition such that said second train of output pulses is supplied from said other of said second pair of solid state electronic devices between said second and third output terminals; f. said pulse generating means changing from said first state of operation wherein said first train of output pulses is supplied to said first output terminal to said second state of operation wherein said second train of output pulses is supplied to said second output terminal in response to said control voltage input signal being applied to said control voltage input terminal to cause said first transistor to go from said OFF condition to said ON condition and energize said relay, whereby said latching means holds said relay in the energized condition after said control voltage signal is extinguished; and g. at least one discrete second unit having a solid state electronic switching device, said switch device having an ON and an OFF condition, said second unit alternately electrically connectable between said first and third terminals of said first unit for receiving said first train of pulses and said second and third terminals of said first unit for receiving said second train of pulses, whereby when said second unit is electrically connected to said first and third terminals said switching device is in the ON condition until said relay is energized and said relay is connected in a normally closed mode, and when said second unit is electrically connected to said second and third terminals said switching device is in said OFF condition until said relay is energized and said relay is connected in a normally open mode.
Claim 3
Dependent Claim
53 words
A solid state unipole relay as set forth in claim 1 wherein: a. said first unit further includes a pair of input terminals for connection to an alternating current source; and b. said first train of output pulses and said second train of output pulses are alternatively generated by said pulse generating means.
Claim 4
Dependent Claim
82 words
A solid state unipole relay as set forth in claim 1 wherein: a. said first unit further includes a first light means connected in circuit with said first output terminal, said first light means being illuminated when said first train of output pulses is supplied to said first output terminal; b. said one of said first pair of solid state electronic devices comprises a transistor; and c. said other of said first pair of solid state electronic devices comprises a unijunction transistor.
Claim 5
Dependent Claim
82 words
A solid state unipole relay as set forth in claim 3 wherein: a. said first unit further includes a second light means connected in circuit with said second output terminal, said second light means being illuminated when said second train of output pulses is supplied to said second output terminal; b. said one of said second pair of solid state electronic devices comprises a transistor; and c. said other of said second pair of solid state electronic devices comprises a unijunction transistor.
Claim 6
Dependent Claim
77 words
A solid state unipole relay as set forth in claim 1 wherein said latching means further includes a. means for receiving said second train of pulses and converting said second train of pulses to a DC level; and b. means for electrically coupling said DC level to the input of said first transistor to hold said first transistor in the ON condition and thereby keep said relay in the energized condition after said control signal is extinguished.
Claim 7
Dependent Claim
307 words
A solid state uNipole relay comprising: a. a first unit having at least first, second and third output terminals, and a control voltage input terminal for receiving a control voltage input signal; b. said first unit further including pulse generating means for generating a first train of output pulses and a second train of output pulses, said pulse generating means having a first state of operation and a second state of operation; c. said pulse generating means changing from said first state of operation wherein said first train of output pulses is supplied between said first and third output terminals to said second state of operation wherein said second train of output pulses is supplied between said second and third output terminals in response to said control voltage input signal being applied to said control voltage input terminal to cause said relay to go from a deenergized to an energized condition; and d. at least one second unit alternately electrically connectable between said first and third terminals of said first unit for receiving said first train of output pulses and second and third terminals of said first unit for receiving said second train of output pulses, said second unit including a pulse transformer, an electronic solid state switching device having an ON and an OFF condition, and circuit means interconnecting said pulse transformer and said switching device in circuit with said first unit whereby when said second unit is electrically connected to said first and third terminals said switching device is in the ON condition until said relay is energized and said relay is connected in a normally closed mode, and when said second unit is electrically connected to said second and third terminals said switching device is in said OFF condition until said relay is energized and said relay is connected in a normally open mode.
Claim 8
Dependent Claim
307 words
A solid state uNipole relay comprising: a. a first unit having at least first, second and third output terminals, and a control voltage input terminal for receiving a control voltage input signal; b. said first unit further including pulse generating means for generating a first train of output pulses and a second train of output pulses, said pulse generating means having a first state of operation and a second state of operation; c. said pulse generating means changing from said first state of operation wherein said first train of output pulses is supplied between said first and third output terminals to said second state of operation wherein said second train of output pulses is supplied between said second and third output terminals in response to said control voltage input signal being applied to said control voltage input terminal to cause said relay to go from a deenergized to an energized condition; and d. at least one second unit alternately electrically connectable between said first and third terminals of said first unit for receiving said first train of output pulses and second and third terminals of said first unit for receiving said second train of output pulses, said second unit including a pulse transformer, an electronic solid state switching device having an ON and an OFF condition, and circuit means interconnecting said pulse transformer and said switching device in circuit with said first unit whereby when said second unit is electrically connected to said first and third terminals said switching device is in the ON condition until said relay is energized and said relay is connected in a normally closed mode, and when said second unit is electrically connected to said second and third terminals said switching device is in said OFF condition until said relay is energized and said relay is connected in a normally open mode.
Claim 9
Dependent Claim
155 words
A solid state unipole relay as set forth in claim 6 wherein: a. said pulse generating means of said first unit includes a first transistor having an ON and an OFF condition, a first pair of solid state electronic devices each having an ON and an OFF condition, a second pair of solid state electronic devices each having an ON and an OFF condition, and circuit means interconnecting said first transistor and said first and second pairs of solid state electronic devices in circuit; b. said one of said first pair of solid state electronic devices comprises a transistor; c. said other of said first pair of said solid state electronic devices comprises a unijunction transistor; and d. said first unit further includes a first light means connected in circuit with said first output terminal, said first light means being illuminated when said first train of input pulses is supplied to said first output terminal.
Claim 10
Dependent Claim
82 words
A solid state unipole relay as set forth in claim 7 wherein: a. said first unit further includes a second light means connected in circuit with said second output terminal, said second light means being illuminated when said second train of output pulses is supplied to said second output terminals; b. said one of said second pair of solid state electronic devices comprises a transistor; and c. said other of said second pair of solid state electronic devices comprises a unijunction transistor.
Claim 11
Dependent Claim
93 words
A solid state unipole relay as set forth in claim 6 further comprising: a. electrical latching means connected in circuit with said pulse generating means of said first unit, said electrical latching means having an unactuated and an actuated condition; b. said electrical latching means changing from said unactuated condition to said actuated condition in response to said control voltage input signal being applied to said control voltage input terminal of said first unit; and c. said electrical latching means when in said actuated condition latching said first transistor in said ON condition.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-06-18 | 1976-12-18 | 1977-06-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-06-18 | 1980-12-18 | 1981-06-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-06-18 | 1984-12-18 | 1985-06-19 | $7700.00 | Window Closed / Lapsed |