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US3737797A Expired / Lapsed US ⏱️ 0.0 years remaining

Differential amplifier

Assignee: RCA Corp
•
Filing: 1971-03-26
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Granted: 1973-06-05
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Expires: 1991-03-26
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Abstract

Abstract Differential amplifier circuits which can be selectively inhibited from operating upon input signals while maintaining a d.c. operating current in the amplifier, whereby recovery from overloading can be accomplished in relatively short time periods.

Inventors

  • 👤 H Amemiya

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 10:56
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/72

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 218 words
An amplifier responsive to complementary input signals solely in the absence of an inhibit signal, comprising: first and second input terminals adapted to receive first and second complementary input signals, respectively; first and second load elements connected to first and second output terminals, respectively; a first amplification device connected between said first input terminal and said first output terminal; a second amplification device connected between said second input terminal and said second output terminal; a third amplification device connected between said first input terminal and said second output terminal; a fourth amplification device connected between said second input terminal and said first output terminal; a first current source continuously connected to supply current to said first and second amplification devices; a second current source; and inhibit signal responsive switch means for coupling said second current source to said third and fourth amplification devices in response to an inhibit signal applied to said switch means, to thereby provide a source of operating current for said third and fourth amplification devices for causing said fourth and third amplification devices to amplify said complementary input signals and to apply them, in amplified form, to said first and second output terminals, respectively, out-of-phase with the signals applied to said first and second output terminals by said first and second amplification devices, respectively.
Claim 2
Dependent Claim 218 words
An amplifier responsive to complementary input signals solely in the absence of an inhibit signal, comprising: first and second input terminals adapted to receive first and second complementary input signals, respectively; first and second load elements connected to first and second output terminals, respectively; a first amplification device connected between said first input terminal and said first output terminal; a second amplification device connected between said second input terminal and said second output terminal; a third amplification device connected between said first input terminal and said second output terminal; a fourth amplification device connected between said second input terminal and said first output terminal; a first current source continuously connected to supply current to said first and second amplification devices; a second current source; and inhibit signal responsive switch means for coupling said second current source to said third and fourth amplification devices in response to an inhibit signal applied to said switch means, to thereby provide a source of operating current for said third and fourth amplification devices for causing said fourth and third amplification devices to amplify said complementary input signals and to apply them, in amplified form, to said first and second output terminals, respectively, out-of-phase with the signals applied to said first and second output terminals by said first and second amplification devices, respectively.
Claim 3
Dependent Claim 148 words
The amplifier recited in claim 1 wherein said first, second, third and fourth amplification devices are, respectively, first, second, third and fourth semiconductor devices each including first and second terminals defining the ends of a conduction path through the device and a control electrode for controlling conduction through said conduction path, said first input terminal connected to the control electrodes of said first and third semiconductor devices, said second input terminal connected to the control electrodes of said second and fourth semiconductor devices, said first output terminal connected to said first terminals of said first and fourth semiconductor devices, said second output terminal connected to said first terminals of said second and third semiconductor devices, said first current source connected to said second terminals of said first and second semiconductor devices, and said second terminals of said third and fourth semiconductor devices connected concurrently to said switch means.
Claim 4
Dependent Claim 136 words
The amplifier recited in claim 2 further including fifth and sixth semiconductor devices each having first and second terminals, said first terminals of the fifth and sixth devices being connected respectively to said first and second output terminals, and said second terminals of said fifth and sixth devices being connected to said switch means for selectively connecting either said second terminals of said fifth and sixth semiconductor devices or said second terminals of said third and fourth semiconductor devices to said second current source, said switch means connecting said fifth and sixth semiconductor devices to said second current source solely in the absence of the inhibit signal so that said second current source provides current to said first and second output terminals through said fifth and sixth semiconductor devices, respectively, when said inhibit signal is absent.
Claim 5
Dependent Claim 78 words
The amplifier recited in claim 3 wherein each of said fifth and sixth semiconductor devices includes first and second terminals defining the ends Of a conduction path through the device and a control electrode for controlling conduction through said conduction path, said control electrodes connected to a reference source, said first terminals of said fifth and sixth semiconductor devices connected respectively to said first and second output terminals, and said second terminals being connected to said switch means.
Claim 6
Dependent Claim 33 words
The amplifier recited in claim 1 wherein the magnitude of the current produced by said first current source is substantially equal to the magnitude of the current produced by said second current source.
Claim 7
Dependent Claim 31 words
The amplifier recited in claim 2 wherein said first, second, third and fourth semiconductor devices are substantially identical devices integrated upon a common substrate so as to have matched operating characteristics.
Claim 8
Dependent Claim 33 words
The amplifier recited in claim 4 wherein said first, second, third, fourth, fifth and sixth semiconductor devices are substantially identical devices integrated upon a common substrate so as to have matched operating characteristics.
Claim 9
Dependent Claim 62 words
The amplifier recited in claim 3 wherein said switch means includes a first output terminal connected to said second terminals of said third and fourth semiconductor devices, a second output terminal connected to said second terminal of said fifth and sixth semiconductor devices, a first input terminal connected to a reference source, and a second input terminal receptive of the inhibit signal.

References Cited (Backward Citations)

US3147446A Cited
US3153196A Cited
US3551836A Cited
US3562660A Cited
US3573496A Cited
US3541467A Cited
US3619790A Cited
US3597697A Cited
US3597639A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-06-04 1976-12-04 1977-06-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-06-04 1980-12-04 1981-06-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-06-04 1984-12-04 1985-06-05 $7700.00 Window Closed / Lapsed

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