Patent US3088955A successfully refreshed from Google Patents.
Patent US3734787A successfully refreshed from Google Patents.
← Back to Patent Explorer
US3734787A Expired / Lapsed US ⏱️ 0.0 years remaining

Fabrication of diffused junction capacitor by simultaneous outdiffusion

Assignee: International Business Machines Corp
•
Filing: 1970-01-09
•
Granted: 1973-05-22
•
Expires: 1990-01-09
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A diffused junction capacitor having two P N junctions, one in the semiconductor substrate and one in an epitaxial layer thereon and exhibiting high capacitance per unit area. A method for forming such a capacitor makes use of the fact that the outdiffusion rate for boron is much faster than the outdiffusion rate for arsenic, whereby, for instance, boron and arsenic diffused into the surface of a semiconductor wafer can, after the growth of an N epitaxial layer, be diffused into the N epitaxial layer. Since the boron outdiffuses much faster, it will cover a larger area than the arsenic outdiffusion. This will, in turn, result in two P -N junctions, one in the substrate and one in the N epitaxial layer.

Inventors

  • 👤 V Dhaka
  • 👤 W Krolikowski

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 16:47
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D1/00; H10D1/60; H10D1/62; H10D1/64; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085; Y10S148/151; Y10S438/00; Y10S438/901

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 20 words
The process of claim 1 wherein said outdiffusion occurs simultaneously with the growth of said epitaxial layer upon said substrate.
Claim 2
Dependent Claim 27 words
The process of claim 1 wherein said P impurity has a rate of diffusion greater than said N impurity by a factor of at least about 10.
Claim 3
Dependent Claim 63 words
The process of claim 1 wherein said N diffused zone is formed in said semiconductor substrate to a depth of about 1 to about 2 microns, and said P diffused zone is formed in said substrate to a depth within the range of about 1 to about 2 microns, said P diffused zone being deeper in said substrate than said N diffused zone.
Claim 4
Dependent Claim 25 words
The process of claim 4 wherein said outdiffusion is performed into said epitaxy layer to a depth of from about 1 to about 1.5 microns.
Claim 5
Dependent Claim 20 words
The process of claim 1 wherein the said P diffused zone is formed prior to forming said N diffused zone.
Claim 6
Dependent Claim 27 words
The process of claim 1 wherein the said separate electrical contact to said P zone and said N zone are made by diffusion reach-throughs in said substrate.
Claim 7
Dependent Claim 165 words
A procEss of forming a self-isolated double diffused junction capacitor comprising: forming a N diffused zone in a P type semiconductor substrate, said diffused zone having a major surface at the surface of the semiconductor substrate and also having side surfaces within said substrate substantially perpendicular to said major surface; forming a P diffused zone in said substrate overlapping the entire side surfaces and a portion of said major surface of said N diffused zone in said substrate and to a depth greater than said N zone, the surface concentration of said P impurity being less than the concentration of said N impurity; growing an epitaxial layer on said substrate; outdiffusing said N and said P impurity into said epitaxial layer, said P impurity having a greater diffusion constant than said N impurity whereby a P N junction is formed in said substrate and in said epitaxial layer; and making separate electrical contact to said P zone and said N zone to form said capacitor.
Claim 8
Dependent Claim 21 words
The process of claim 8 wherein said N diffused zone contains arsenic dopant and said P diffused zone contains boron dopant.
Claim 9
Dependent Claim 20 words
The process of claim 8 wherein the said P diffused zone is formed prior to forming said N diffused zone.

References Cited (Backward Citations)

US3260902A Cited
US3449643A Cited
FR1541490A Cited
US3474308A Cited
US3474309A Cited
US3502951A Cited
US3617827A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-05-21 1976-11-20 1977-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-05-21 1980-11-20 1981-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-05-21 1984-11-20 1985-05-22 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag