US3617827A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device with complementary transistors
Assignee: Individual
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Filing: 1970-03-30
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Granted: 1971-11-02
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Expires: 1990-03-30
Abstract
Abstract A semiconductor device comprising complementary transistors is described. Both transistors are made in a single island and each include a buried layer. The PNP transistor uses the buried layer as collector, and the NPN transistor uses the buried layer to reduce collector resistance. The result is a fast-switching NPN transistor.
Inventors
- 👤 Albert Schmitz
- 👤 Cornelis Mulder
- 👤 Arie Slob
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 20:05
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/67; H10D84/673; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085; Y10S148/151
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
15 words
a diffused emitter region of said opposite conductivity type formed within said base region, wherein,
Claim 2
Dependent Claim
34 words
A transistor device as set forth in claim 1 wherein the diffused emitter region of the second transistor and the diffused base region of the first transistor are contiguous and continuous with one another.
Claim 3
Dependent Claim
119 words
the epitaxial layer isolated within said one island forms the base region of said second transistor; f. a first buried diffused region of said one conductivity type formed within a region of said one island adjacent the substrate with said buried region being contiguous with the substrate, said first buried region underlying its respective base and emitter regions and forming the collector region of said second transistor; g. and a second buried diffused region of said opposite conductivity type wholly lying beside the first buried region in adjacent areas of the substrate and said one island, said second buried region underlying its respective base and emitter regions and providing a low-resistivity path for collector current in said first transistor.
Claim 4
Dependent Claim
24 words
A transistor as set forth in claim 2 wherein the first transistor is a NPN transistor and the second transistor is a PNP transistor.
Claim 5
Dependent Claim
30 words
the epitaxial layer isolated within said first island forms the collector region of said first transistor; e. a second transistor formed within said same one island, said second transistor including:
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-11-01 | 1975-05-03 | 1975-11-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-11-01 | 1979-05-03 | 1979-11-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-11-01 | 1983-05-03 | 1983-11-02 | $7700.00 | Window Closed / Lapsed |