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US3733477A Expired / Lapsed US ⏱️ 0.0 years remaining

Iterative binary divider utilizing multiples of the divisor

Assignee: Control Data Corp
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Filing: 1972-02-04
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Granted: 1973-05-15
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Expires: 1992-02-04
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Abstract

Abstract A high speed divider is provided for a digital computer for generating a predetermined number of partial quotient bits per iteration by initially using a decode table implemented by a logic network to examine a predetermined number of high order bits of the divisor and another predetermined number of high order bits of the dividend, on the first iteration, and on successive iterations, of the partial remainder. The decode table is generated using the principle that for a given range of the divisor and dividend, as established by fixing the high order digits thereof, a limited range of possible partial quotients exists. The number of difference networks required to form partial remainders is limited to the number of decoded possible values for the partial quotient to be generated. A number of trial possible partial remainders are generated by the difference networks using the multiples of the divisor equal to the decoded possible partial quotient values. A second decode table, implemented by a logic network, determines, from the multiples of the divisor gated to the difference networks, and the results determined therein, which has produced the new partial remainder for the next iteration. The bits of the partial quotient are determined by a selector which examines the multiples of the divisor gated to the difference networks and the network from which the new partial remainder was derived. The process of iteration continues until the entire quotient is generated.

Inventors

  • 👤 D Tate
  • 👤 L Steiner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 04:20
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/52; G06F7/535; G06F2207/00; G06F2207/535; G06F2207/5353

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 270 words
A high speed divider for performing iterative division of a dividend by a divisor in a digital computer comprising: means for storing the divisor, means for storing the dividend at the initiation of the division and partial remainders during successive iterations of the division, means for storing partial quotients developed on iterations of the division until a complete quotient is developed, decode means, connected to said means for storing a divisor and to said means for storing a dividend, for determining a selected number of possible partial quotients, from a range of partial quotients, by examination of a first predetermined number of high order divisor bits, and a second predetermined number of high order dividend bits, and on successive iterations of the division, partial remainder bits, means, connected with said decode means and said means for storing a divisor, for producing multiples, equal to the possible partial quotients determined by said decode means, of the divisor, means, connected to said means for storing a dividend and to said means for producing multiples of the divisor, for determining the differences between each of the selected divisor multiples and the dividend, intially, and the partial remainder on successive iterations, partial remainder selector means, connected to said difference determining means, for determing which of said differences is the new partial remainder by examination of the algebraic signs of the differences developed with regard to the divisor multiples used in determining the differences, and answer selector means for determining the partial quotient developed by examination of the differences developed by said difference means with respect to the divisor multiples used in determining said differences.
Claim 2
Dependent Claim 270 words
A high speed divider for performing iterative division of a dividend by a divisor in a digital computer comprising: means for storing the divisor, means for storing the dividend at the initiation of the division and partial remainders during successive iterations of the division, means for storing partial quotients developed on iterations of the division until a complete quotient is developed, decode means, connected to said means for storing a divisor and to said means for storing a dividend, for determining a selected number of possible partial quotients, from a range of partial quotients, by examination of a first predetermined number of high order divisor bits, and a second predetermined number of high order dividend bits, and on successive iterations of the division, partial remainder bits, means, connected with said decode means and said means for storing a divisor, for producing multiples, equal to the possible partial quotients determined by said decode means, of the divisor, means, connected to said means for storing a dividend and to said means for producing multiples of the divisor, for determining the differences between each of the selected divisor multiples and the dividend, intially, and the partial remainder on successive iterations, partial remainder selector means, connected to said difference determining means, for determing which of said differences is the new partial remainder by examination of the algebraic signs of the differences developed with regard to the divisor multiples used in determining the differences, and answer selector means for determining the partial quotient developed by examination of the differences developed by said difference means with respect to the divisor multiples used in determining said differences.
Claim 3
Dependent Claim 24 words
The divider of claim 1 wherein three bits of the divisor and 4 bits of the dividend or partial remainder are examined per iteration.
Claim 4
Dependent Claim 81 words
The divisor of claim 1 wherein said differences are determined by three difference networks wherein 3 bits of partial quotients are developed per iteration and wherein said first difference network performs differences with respect to one times, four times, and seven times the divisor, and said second difference network differences with respect to two times and five times the divisor, and wherein said third difference network finds differences with respect to a zero times, three times and six times the divisor.
Claim 5
Dependent Claim 29 words
The divider of claim 3 and further comprising means for determining the ranking of the difference networks with respect to the numerical order of divisor multiples chosen for differencing.
Claim 6
Dependent Claim 46 words
The divider of claim 4 wherein said partial remainder selector determines the correct partial remainder from the three partial remainders produced by examining the signs of the partial remainders with respect to the ranking determined by said means for determining the ranking of said difference networks.
Claim 7
Dependent Claim 41 words
The divider of claim 5 wherein said answer selector determines the quotient bits of the new partial quotient by examining the difference network which has produced the new partial remainder with respect to the divisor multiple examined by said difference network.

References Cited (Backward Citations)

US3234366A Cited
US3223831A Cited
US3234367A Cited
US3684879A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-05-14 1976-11-13 1977-05-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-05-14 1980-11-13 1981-05-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-05-14 1984-11-13 1985-05-15 $7700.00 Window Closed / Lapsed

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