Patent US3728718A successfully refreshed from Google Patents.
US3728718A
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US
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Servo system having high resolution d/a
Assignee: Colt Industries Operating Corp
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Filing: 1972-01-18
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Granted: 1973-04-17
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Expires: 1992-01-18
Abstract
Abstract A numerical control system for moving a controlled member along a given axis includes a digital to analog converter and a logic circuit to increase the resolution of the digital to analog converter. The logic circuit subdivides adjacent counts retained in the logic circuit by varying the amount of time during which the respective counts are directed to the digital to analog converter. The counts retained in the logic circuit differ by a fixed amount, and the magnitude of these counts is dependent upon the input pulse frequency applied to the logic circuit.
Inventors
- 👤 A Dresser
- 👤 J Reuteler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 08:46
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/18; G05B19/19; G05B19/21; G05B19/23; G05B19/231; G05B19/232; G05B2219/00; G05B2219/30; G05B2219/33; G05B2219/33268; H; H03; H03M; H03M1/00; H03M1/66; H03M1/668
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
239 words
A HIGH RESOLUTION DIGITAL TO ANALOG CONVERTER COMPRISING: A FIRST COUNTER CIRCUIT FOR RECEIVING DIGITAL INPUT SIGNALS AND FOR PERIODICALLY GENERATING AN OVERFLOW SIGNAL AFTER A PREDETERMINED NUMBER OF DIGITAL SIGNALS HAVE BEEN RECEIVED; A CLOCK FOR GENERATING A PLURALITY OF TIMING PULSES; A PREDETERMINED NUMBER OF CLOCK CYCLES DEFINING A SAMPLING PERIOD; A COUNT CONTROL CIRCUIT OPERATIVELY CONNECTED TO THE FIRST COUNTER CIRCUIT AND THE CLOCK FOR RECEIVING A FIXED NUMBER OF TIMING PULSES FROM THE CLOCK DURING THE SAMPLING PERIOD AND THE OVERFLOW SIGNAL FROM THE FIRST COUNTER AND GENERATING A COUNT FOR EVERY EACH OF THE FIXED NUMBER OF TIMING PULSES AND THE OVERFLOW SIGNAL; A SECOND COUNTER OPERATIVELY CONNECTED TO THE COUNT CONTROL CIRCUIT FOR RECEIVING COUNTS FROM THE COUNT CONTROL CIRCUIT; A FIRST STORAGE DEVICE FOR RETAINING A NUMBER DERIVED FROM THE COUNTER AT A PREDETERMINED TIME IN THE SAMPLING PERIOD; A SECOND STORAGE DEVICE FOR RETAINING THE NUMBER DERIVED FROM THE COUNTER AS INCREMENTED BY A FIXED NUMBER; A DIGITAL TO ANALOG CONVERTER ADAPTED TO CONVERT A DIGITAL SIGNAL TO AN ANALOG SIGNAL; AND A LATCH CONTROL CIRCUIT OPERATIVELY CONNECTED TO THE FIRST COUNTER AND THE FIRST AND SECOND STORAGE DEVICES FOR SELECTIVELY APPLYING THE RESPECTIVE NUMBER IN THE STORAGE DEVICES TO THE DIGITAL TO ANALOG CONVERTER IN ACCORDANCE WITH THE OCCURRENCE OF THE OVERFLOW SIGNAL TO THEREBY VARY THE AVERAGE ANALOG SIGNAL WITH THE RATE OF RECEPTION OF THE DIGITAL INPUT SIGNALS.
Claim 2
Dependent Claim
239 words
A HIGH RESOLUTION DIGITAL TO ANALOG CONVERTER COMPRISING: A FIRST COUNTER CIRCUIT FOR RECEIVING DIGITAL INPUT SIGNALS AND FOR PERIODICALLY GENERATING AN OVERFLOW SIGNAL AFTER A PREDETERMINED NUMBER OF DIGITAL SIGNALS HAVE BEEN RECEIVED; A CLOCK FOR GENERATING A PLURALITY OF TIMING PULSES; A PREDETERMINED NUMBER OF CLOCK CYCLES DEFINING A SAMPLING PERIOD; A COUNT CONTROL CIRCUIT OPERATIVELY CONNECTED TO THE FIRST COUNTER CIRCUIT AND THE CLOCK FOR RECEIVING A FIXED NUMBER OF TIMING PULSES FROM THE CLOCK DURING THE SAMPLING PERIOD AND THE OVERFLOW SIGNAL FROM THE FIRST COUNTER AND GENERATING A COUNT FOR EVERY EACH OF THE FIXED NUMBER OF TIMING PULSES AND THE OVERFLOW SIGNAL; A SECOND COUNTER OPERATIVELY CONNECTED TO THE COUNT CONTROL CIRCUIT FOR RECEIVING COUNTS FROM THE COUNT CONTROL CIRCUIT; A FIRST STORAGE DEVICE FOR RETAINING A NUMBER DERIVED FROM THE COUNTER AT A PREDETERMINED TIME IN THE SAMPLING PERIOD; A SECOND STORAGE DEVICE FOR RETAINING THE NUMBER DERIVED FROM THE COUNTER AS INCREMENTED BY A FIXED NUMBER; A DIGITAL TO ANALOG CONVERTER ADAPTED TO CONVERT A DIGITAL SIGNAL TO AN ANALOG SIGNAL; AND A LATCH CONTROL CIRCUIT OPERATIVELY CONNECTED TO THE FIRST COUNTER AND THE FIRST AND SECOND STORAGE DEVICES FOR SELECTIVELY APPLYING THE RESPECTIVE NUMBER IN THE STORAGE DEVICES TO THE DIGITAL TO ANALOG CONVERTER IN ACCORDANCE WITH THE OCCURRENCE OF THE OVERFLOW SIGNAL TO THEREBY VARY THE AVERAGE ANALOG SIGNAL WITH THE RATE OF RECEPTION OF THE DIGITAL INPUT SIGNALS.
Claim 3
Dependent Claim
155 words
a high resolution digital to analog converter adapted to receive digital input signals comprising: a digital to analog converter to convert a digital signal to an analog signal; first counting means to count the input signals and generate a signal after a predetermined number of input signals have been counted; means to generate a timing signal to define a sampling period; second counting means to count a predetermined number of signals in the sampling period and the signal from the first means; first storage means to store a count derived from said second counting means at a fixed time in the sampling period; second storage means to store the count stored by the first storage means plus a fixed number and means responsive to the signal generated by the first counting means to selectively apply the respective counts stored in the first storage means and the second storage means to the digital to analog converter.
Claim 4
Dependent Claim
155 words
a high resolution digital to analog converter adapted to receive digital input signals comprising: a digital to analog converter to convert a digital signal to an analog signal; first counting means to count the input signals and generate a signal after a predetermined number of input signals have been counted; means to generate a timing signal to define a sampling period; second counting means to count a predetermined number of signals in the sampling period and the signal from the first means; first storage means to store a count derived from said second counting means at a fixed time in the sampling period; second storage means to store the count stored by the first storage means plus a fixed number and means responsive to the signal generated by the first counting means to selectively apply the respective counts stored in the first storage means and the second storage means to the digital to analog converter.
Claim 5
Dependent Claim
70 words
The converter of claim 2, further including: latch control means to latch the count in the second counting means into the first storage means, to subsequently latch the count in the first storage means inTo the second storage means, to subsequently latch an incremented count in the counting means into the first storage means, and to subsequently latch the count in the first storage means into the second storage means.
Claim 6
Dependent Claim
22 words
The converter of claim 2, wherein the first counting means comprises: a binary counter; and a one-shot operatively connected to the counter.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-16 | 1976-10-16 | 1977-04-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-16 | 1980-10-16 | 1981-04-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-16 | 1984-10-16 | 1985-04-17 | $7700.00 | Window Closed / Lapsed |