Method of and apparatus for approximately proportional reduction of impulse series

Claim 1

Apparatus for reducing an input pulse sequence with a pulse number fo and forming an output pulse sequence with a pulse number g congruent Alpha o. f o wherein Alpha o is a proportionality factor falling within the limits 1> Alpha o>1/2 which comprises: a discriminator circuit grouping said input pulse sequence in groups of r pulses and which delivers r-1 first pulses of each group to a first output and the rth pulse via a first gate circuit to a second output, a summation circuit connected to said first and second outputs from said discriminator circuit for forming an intermediate pulse series, a first bidirectional counter connected to said first output, said counter delivering an opening pulse to said first gate circuit after reaching a nominal counter reading s(r-1) wherein r and s are the highest whole numbers for the relationship r/r1 >1 / Alpha o>sr/s(r-1) +1, a second gate circuit connected to the output side of said summation circuit which produces said output pulses, a second bidirectional counter connected to the output of said first counter via a third gate circuit, said second counter delivering a suppression pulse to said second gate circuit after reaching its nominal counter reading, and a correction circuit connected to the output of said first counter for periodically suppressing via said third gate circuit individual pulses to be fed to said second counter or which feeds to it additional pulses.