Electronically rewritable read-only memory using via connections

Claim 2

In an array of P-N junctions formed in a semiconductor substrate wherein at least a first active region of the junctions is coplanar with the surface of the substrate, the method of fabricating an electronically rewritable read-only memory comprising the steps of: forming a dielectric film over the substrate surface, the dielectric film being relatively thin in areas over said active regions; depositing a thin metallic film over the dielectric film; applying a breakdown potential across the metallic and dielectric films, causing the metal to diffuse through the thin areas of the dielectric as an ohmic via connection to the active regions, and causing the contact between the metallic film and the via connections to be disrupted around the thin areas of the dielectric; depositing a second layer of metal over the metallic film to establish conductive contact between the metallic layer and the active junction regions; applying a current pulse to selected via connection, thereby breaking the via connections, and disrupting the conductive contact between the metallic layer and the P-N junctions associated with the selected broken via connections.

Claim 3

A method according to claim 1 wherein the dielectric film is silicon dioxide having a thickness in its relatively thin areas of around 1500 A; and the breakdown potential is around 80 volts.

Claim 4

A method according to claim 1 wherein the thin metallic film is aluminum having a thickness of around 1000 A and the current pulse is in the range of a few milliamperes.

Claim 5

A method according to claim 1 wherein the forming of relatively thin areas in the dielectric film comprises the step of: etching the dielectric film to the selected thickness in the areas over said active regions.

Claim 6

A method according to claim 1 wherein said junctions include a second active region in said substrate and the breakdown voltage is applied across the second active regions and the thin metallic film in the forward bias direction of the junctions.

Claim 7

A method according to claim 1 wherein said junctions include a second active region disposed in said substrate to form bit lines for the array and further comprising the step of: etching the thin metallic film and the second layer of metal to form word lines orthogonally disposed with respect to the bit lines.

Claim 8

The method according to claim 6 wherein both said first and second active regions of each junction are coplanar with the substrate surface; and the relatively thin area of the dielectric film extends only over said first active region of each junction.

Claim 9

A method according to claim 6 wherein one half of the magnitude of said current pulse is applied to the word line of said via connections selected to be broken and one half of the magnitude is applied to the bit line of said selected via connections, the current being applied in the forward bias direction of the junctions associated with the selecteD via connections.

Claim 10

The method of rewriting a read-only memory fabricated in accordance with the method of claim 1 comprising the steps of: applying a voltage pulse to selected broken via connections to heal the via connections, thereby reestablishing conductive contact between the metallic layer and the junctions associated with the reformed via connections; and applying a current pulse to selected unbroken via connections, thereby breaking the via connections and disrupting the conductive contact between the metallic layer and the junctions associated with the broken via connections.

Claim 11

A method according to claim 9 wherein: the dielectric film is silicon dioxide having a thickness in its relatively thin areas of around 1500 A; the breakdown voltage is around 80 volts; the thin metallic film is aluminum having a thickness of around 1000 A; the healing voltage is in the range of 2.5 to 3 volts; and the current pulse is in the range of a few milliamperes.

Claim 12

In a semiconductor substrate having diffused therein isolated channels of a first conductivity type and localized regions of a second conductivity type diffused within the channels to form a matrix array of P-N junctions, the method of fabricating an electronically rewritable read-only memory comprising the steps of: forming a dielectric film over the substrate surface, the dielectric film being relatively thin in areas over said localized regions; depositing a thin metallic film over the dielectric film; applying a breakdown potential across the metallic and dielectric films, causing the metal to diffuse through the thin areas of the dielectric as an ohmic via connection to the localized regions, and causing the contact between the metallic film and the via connections to be disrupted around the thin areas of the dielectric; depositing a second layer of metal over the metallic film to establish conductive contact between the metallic layer and the localized regions; etching the thin metallic film and the second layer of metal to form over said regions of said second conductivity type word lines orthogonally disposed with respect to said isolated channels which operate as bit lines; and applying a current pulse to selected via connections, thereby breaking the via connections, and disrupting the conductive contact between the word lines and the junctions associated with the selected broken via connections; whereby the unbroken via connections may be sensed as ''''1'''' bits and the broken via connections may be sensed as ''''0'''' bits in the memory.

Claim 13

In a semiconductor substrate having diffused therein isolated channels of a first conductivity type and localized regions of a second conductivity type diffused within the channels to form a matrix array of P-N junctions, the method of fabricating an electronically rewritable read-only memory comprising the steps of: forming a dielectric film over the substrate surface, the dielectric film being relatively thin in areas over said localized regions; depositing a thin metallic film over the dielectric film; applying a breakdown potential across the metallic and dielectric films, causing the metal to diffuse through the thin areas of the dielectric as an ohmic via connection to the localized regions, and causing the contact between the metallic film and the via connections to be disrupted around the thin areas of the dielectric; depositing a second layer of metal over the metallic film to establish conductive contact between the metallic layer and the localized regions; etching the thin metallic film and the second layer of metal to form over said regions of said second conductivity type word lines orthogonally disposed with respect to said isolated channels which operate as bit lines; and applying a current pulse to selected via connections, thereby breaking the via connections, and disrupting the conductive contact between the word lines and the junctions associated with the selected broken via connections; whereby the unbroken via connections may be sensed as ''''1'''' bits and the broken via connections may be sensed as ''''0'''' bits in the memory.

Claim 14

The method of rewriting a read-only memory fabricated in accordance with the method of claim 11 comprising the steps of: applying a voltage pulse to selected broken via connections to heal the via connections, thereby reestablishing conductive contact between the word lines and the junctions associated with the reformed via connections, and converting a ''''0'''' bit to a ''''1'''' bit in the memory; applying a current pulse to selected unbroken via connections, thereby breaking the via connections and disrupting the conductive contact between the word lines and the junctions associated with the broken via connections, and converting a ''''1'''' to a ''''0''''bit in the memory.

Claim 15

A method according to claim 12 wherein one half of the magnitude of said current pulse is applied to the word line of said via connections selected to be broken and one half of the magnitude is applied to the bit line of said selected via connections, the current being applied to forward bias the junctions associated with the selected via connections.

Claim 16

An electronically rewritable read-only memory comprising: an array of P-N junctions formed in a semiconductor substrate, at least a first active region of each junction being coplanar with the surface of the semiconductor substrate; a dielectric fiLm disposed on the surface of said substrate, the film being relatively thin over said first active regions; via connections diffused through the thin areas of the dielectric film in ohmic contact with said first active region of each diode to indicate a logic ''''1'''' bit, selected ones of the via connections being broken to indicate a ''''0'''' logic bit; circuit means for applying a current pulse to selected unbroken via connections to break the previously unbroken via connections and thereby rewriting a logic ''''1'''' bit to a logic ''''0'''' bit; circuit means for applying a healing voltage pulse to selected broken via connections to heal a previously broken via connection and thereby rewriting a logic ''''0'''' bit to a logic ''''1'''' bit.

Claim 17

An electronically rewritable read-only memory comprising: an array of P-N junctions formed in a semiconductor substrate, at least a first active region of each junction being coplanar with the surface of the semiconductor substrate; a dielectric fiLm disposed on the surface of said substrate, the film being relatively thin over said first active regions; via connections diffused through the thin areas of the dielectric film in ohmic contact with said first active region of each diode to indicate a logic ''''1'''' bit, selected ones of the via connections being broken to indicate a ''''0'''' logic bit; circuit means for applying a current pulse to selected unbroken via connections to break the previously unbroken via connections and thereby rewriting a logic ''''1'''' bit to a logic ''''0'''' bit; circuit means for applying a healing voltage pulse to selected broken via connections to heal a previously broken via connection and thereby rewriting a logic ''''0'''' bit to a logic ''''1'''' bit.

Claim 18

A read-only memory as in claim 14 further comprising: a second active region of each junction disposed in said substrate to form bit lines for the array; and conductive word lines disposed on the surface of the dielectric film orthogonal to the bit lines and connected by the diffused via connections to said first active regions of the junctions.

Claim 19

A read-only memory as in claim 15 wherein said semiconductor substrate is used as the collector of a transistor in which said first and second active regions of each junction comprise an emitter and a base region, respectively, thereby allowing bit selection by using the transistor for sensing a selected bit location.

Claim 20

An electronically rewritable read-only memory comprising: an array of P-N junctions formed in a semiconductor substrate, at least a first active region of each junction being coplanar with the surface of the semiconductor substrate; a second active region of each junction disposed in said substrate to form bit lines for the array; a dielectric film disposed on the surface of said substrate, the film being relatively thin over said first active regions; via connections diffused through the thin areas of the dielectric film in ohmic contact with said first active region of each junction to indicate a logic ''''1'''' bit, selected ones of the via connections being broken to indicate a logic ''''0'''' bit; and conductive word lines disposed on the surface of the dielectric film orthogonal to the bit lines and connected by the diffused via connections to said first active regions of the junctions.

Claim 21

An electronically rewritable read-only memory comprising: an array of P-N junctions formed in a semiconductor substrate, at least a first active region of each junction being coplanar with the surface of the semiconductor substrate; a second active region of each junction disposed in said substrate to form bit lines for the array; a dielectric film disposed on the surface of said substrate, the film being relatively thin over said first active regions; via connections diffused through the thin areas of the dielectric film in ohmic contact with said first active region of each junction to indicate a logic ''''1'''' bit, selected ones of the via connections being broken to indicate a logic ''''0'''' bit; and conductive word lines disposed on the surface of the dielectric film orthogonal to the bit lines and connected by the diffused via connections to said first active regions of the junctions.