Patent US3711729A successfully refreshed from Google Patents.
US3711729A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Monostable multivibrator having output pulses dependent upon input pulse widths
Assignee: Unisys Corp
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Filing: 1971-08-04
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Granted: 1973-01-16
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Expires: 1991-08-04
Abstract
Abstract A single-shot monostable multivibrator for generating an output pulse the duration of which is a function of the time duration of the input (trigger) pulse and the resistive components of an R-C network, including a pair of normally conducting transistor switches and a pair of R-C paths having a capacitor in common. Application of the input pulse turns off the first switch and allows the capacitor to charge substantially linearly through the first path including the base of the second switch until the termination of the input pulse. The capacitor then discharges substantially linearly through the collector of the first switch forced by a reverse potential through the second path. The time duration of the output pulse is a function of the ratio of the resistive components in the discharging and charging paths and the width of the input pulse. A plurality of control circuits is provided for regulating the amount of resistance in the R-C paths.
Inventors
- 👤 V Quiogue
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:41
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/13; H03K5/01; H03K5/04
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
135 words
A multivibrator having a stable state and a quasi-stable state comprising: first and second parallel current paths for connecting potential means of like polarity to ground, each of said paths including an individual predetermined resistance; a capacitor interconnecting said paths between said resistances and ground; normally closed, pulse responsive switch means in one of said paths for forcing, when opened, a first current to flow for linearly charging said capacitor and for allowing, when closed, a second current to flow for discharging said capacitor; and normally closed, polarity sensitive switch means in the other of said paths for opening said other path to ground when said capacitor initially begins to discharge for forcing said second current to linearly discharge said capacitor, and for closing said other path when the charge on said capacitor approaches ground.
Claim 2
Dependent Claim
135 words
A multivibrator having a stable state and a quasi-stable state comprising: first and second parallel current paths for connecting potential means of like polarity to ground, each of said paths including an individual predetermined resistance; a capacitor interconnecting said paths between said resistances and ground; normally closed, pulse responsive switch means in one of said paths for forcing, when opened, a first current to flow for linearly charging said capacitor and for allowing, when closed, a second current to flow for discharging said capacitor; and normally closed, polarity sensitive switch means in the other of said paths for opening said other path to ground when said capacitor initially begins to discharge for forcing said second current to linearly discharge said capacitor, and for closing said other path when the charge on said capacitor approaches ground.
Claim 3
Dependent Claim
45 words
The multivibrator of claim 1 wherein said pulse responsive switch means comprises: a first transistor; first biasing means for normally rendering said first transistor conducting; and means for rendering said first transistor non-conducting for the duration of an input pulse applied to said first transistor.
Claim 4
Dependent Claim
49 words
The multivibrator of claim 2 wherein said polarity sensitive switch means comprises: a second transistor; second biasing means for normally rendering said second transistor conducting; and means responsive to the initial discharge of said capacitor for rendering said second transistor non-conducting until the charge on said capacitor approaches ground.
Claim 5
Dependent Claim
55 words
The multivibrator of claim 3 including means for taking an output pulse from said second transistor for the period said second transistor is non-conducting, whereby said output pulse is initiated concurrently with the termination of said input pulse and the time duration of said quasi-stable state is represented by the width of said output pulse.
Claim 6
Dependent Claim
40 words
The multivibrator of claim 4 wherein the ratio of the time duration of said input pulse to said quasi-stable state is substantially equal to a ratio of the electrical ohmic value of said predetermined resistances in each of said paths.
Claim 7
Dependent Claim
25 words
The multivibrator of claim 1 in which said first and second current paths include means for connecting potential means of the same volTage to ground.
Claim 8
Dependent Claim
29 words
The multivibrator of claim 1 wherein each of said individual predetermined resistances comprises: a first resistor; and resistive means selectively connectable in parallel circuit relation with said first resistor.
Claim 9
Dependent Claim
46 words
The multivibrator of claim 7 wherein said resistive means comprises: a unidirectional device; a plurality of second resistors; and means synchronized with said pulse-responsive switch means for connecting selected ones of said plurality of second resistors in parallel with said first resistor through said unidirectional device.
Claim 10
Dependent Claim
20 words
The multivibrator of claim 1 also including means for maintaining substantially constant current flow through said first and second paths.
Claim 11
Dependent Claim
50 words
The multivibrator of claim 1 wherein the ratio of the time duration said pulse-responsive switch means is opened to the time duration said other path is opened by said polarity-sensitive switch means is substantially equal to the ratio of the electrical ohmic values of said predetermined resistances in said paths.
Claim 12
Dependent Claim
145 words
In combination: first and second transistors each having a base and a collector; biasing means for normally rendering said first and said second transistors conducting; capacitive means coupling said collector of said first transistor to said base of said second transistor; first means coupled to said collector of said first transistor for linearly charging said capacitive means through said second transistor in response to the presence of a signal at said base of said first transistor, said second transistor being turned ''''off'''' as said capacitive means initially begins to discharge; second means coupled to said base of said second transistor for forcing the rapid discharge of said capacitive means through said first transistor until the charge on said capacitive means approaches ground, said second transistor producing an output signal on said collector of said second transistor only during said forced discharging of said capacitive means.
Claim 13
Dependent Claim
145 words
In combination: first and second transistors each having a base and a collector; biasing means for normally rendering said first and said second transistors conducting; capacitive means coupling said collector of said first transistor to said base of said second transistor; first means coupled to said collector of said first transistor for linearly charging said capacitive means through said second transistor in response to the presence of a signal at said base of said first transistor, said second transistor being turned ''''off'''' as said capacitive means initially begins to discharge; second means coupled to said base of said second transistor for forcing the rapid discharge of said capacitive means through said first transistor until the charge on said capacitive means approaches ground, said second transistor producing an output signal on said collector of said second transistor only during said forced discharging of said capacitive means.
Claim 14
Dependent Claim
31 words
The combination of claim 11 wherein said first means and said second means each includes: variable resistive means; and constant current-regulating means connected in series circuit relation with said resistive means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-01-16 | 1976-07-17 | 1977-01-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-01-16 | 1980-07-17 | 1981-01-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-01-16 | 1984-07-17 | 1985-01-16 | $7700.00 | Window Closed / Lapsed |