Patent EP0378185A2 successfully refreshed from Google Patents.
Patent US3702947A successfully refreshed from Google Patents.
US3702947A
Expired / Lapsed
US
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Monolithic darlington transistors with common collector and seperate subcollectors
Assignee: TDK Micronas GmbH
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Filing: 1971-10-14
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Granted: 1972-11-14
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Expires: 1991-10-14
Abstract
Abstract The saturation voltage of a monolithic integrated Darlington circuit consists of the collector emitter saturation voltage of the driver transistor and the base-emitter threshold voltage of the end transistor. The collector current of the end transistor flows over a semiconductor region which is in common with the collector circuit of the driver transistor causing the saturation voltage to rise. This problem is solved by dividing the usually mutual buried layer of the two transistors into two separate buried layers.
Inventors
- 👤 Harald Schilling
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 07:42
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/137; H10D84/00; H10D84/60; H10D84/611; H10D84/613; H10D84/615; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085; Y10S148/136
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
135 words
A monolithic integrated semiconductor circuit comprising: a substrate; an epitaxial layer on said substrate having a given conductivity type; an isolating region penetrating said epitaxial layer and forming an isolated island with said substrate; at least two transistors having one common collector and seperate bases and emitters in said island, and conducting means for connecting the base of one of said transistors and the emitter of the other of said transistors; and an intermediate layer having the same conductivity as but of lower resistivity than that of said epitaxial layer arranged between said substrate and said epitaxial layer, said intermediate layer divided into two portions, with one of said portions lying below the base of each of said two transistors, said two portions being seperated from each other by a part of said epitaxial layer.
Claim 2
Dependent Claim
135 words
A monolithic integrated semiconductor circuit comprising: a substrate; an epitaxial layer on said substrate having a given conductivity type; an isolating region penetrating said epitaxial layer and forming an isolated island with said substrate; at least two transistors having one common collector and seperate bases and emitters in said island, and conducting means for connecting the base of one of said transistors and the emitter of the other of said transistors; and an intermediate layer having the same conductivity as but of lower resistivity than that of said epitaxial layer arranged between said substrate and said epitaxial layer, said intermediate layer divided into two portions, with one of said portions lying below the base of each of said two transistors, said two portions being seperated from each other by a part of said epitaxial layer.
Claim 3
Dependent Claim
43 words
A semiconductor circuit according to claim 1, further comprising a contact zone for making electrical connection to the common collector of said two transistors, said contact zone overlying each of said portions of said intermediate layer and said part of said epitaxial layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-11-14 | 1976-05-15 | 1976-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-11-14 | 1980-05-15 | 1980-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-11-14 | 1984-05-15 | 1984-11-14 | $7700.00 | Window Closed / Lapsed |