US3702407A
Expired / Lapsed
US
⏱️ 0.0 years remaining
A circuit for converting a variable frequency pulse train into a related electric voltage
Assignee: US Philips Corp
•
Filing: 1970-07-27
•
Granted: 1972-11-07
•
Expires: 1990-07-27
Abstract
Abstract A frequency-to-DC converter circuit for producing an output voltage related to the frequency of a train of input pulses. The circuit includes an improved ''''diode pump'''' circuit in which the input capacitor discharges through a diode only to a given reference voltage different from ground potential during the period between successive input pulses. The reference voltage approximates the instantaneous voltage across the circuit storage capacitor. The output voltage is preferably taken from the junction of an RC time constant circuit. The converter is especially adapted to provide a speed signal in an anti-lock brake system.
Inventors
- 👤 Denis Sharp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 12:21
CPC Classifications
H; H03; H03K; H03K9/00; H03K9/06; B; B60; B60T; B60T8/00; B60T8/17; B60T8/172; G; G01; G01R; G01R23/00; G01R23/02; G01R23/06; G01R23/09
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
164 words
An electrical converter circuit comprising a pair of input terminals adapted to receive a train of input pulses of variable frequency, an input capacitor and a first diode connected in series circuit to said input terminals, a storage capacitor arranged to capacitor, charged in response to input pulses applied to it through the series circuit comprising said input capacitor and said first diode, a discharge circuit connected to said storage capacitor through which the charge on said storage capacitor can decay during the periods between successive input pulses, a second diode coupled to the input capacitor through which said input capacitor can discharge during the periods between successive input pulses, and means including said second diode for clamping the junction of the input capacitor and the first diode to a reference voltage value which approximates the instantaneous voltage across said storage capacitor and an output terminal coupled to said storage capacitor for deriving an output voltage proportional to the frequency of the input pulses.
Claim 2
Dependent Claim
164 words
An electrical converter circuit comprising a pair of input terminals adapted to receive a train of input pulses of variable frequency, an input capacitor and a first diode connected in series circuit to said input terminals, a storage capacitor arranged to capacitor, charged in response to input pulses applied to it through the series circuit comprising said input capacitor and said first diode, a discharge circuit connected to said storage capacitor through which the charge on said storage capacitor can decay during the periods between successive input pulses, a second diode coupled to the input capacitor through which said input capacitor can discharge during the periods between successive input pulses, and means including said second diode for clamping the junction of the input capacitor and the first diode to a reference voltage value which approximates the instantaneous voltage across said storage capacitor and an output terminal coupled to said storage capacitor for deriving an output voltage proportional to the frequency of the input pulses.
Claim 3
Dependent Claim
49 words
A converter circuit as claimed in claim 1 wherein said storage capacitor is connected in series with the input capacitor and the first diode across said input terminals and said clamping means comprises the second diode And a resistor connected in series between said junction and said output terminal.
Claim 4
Dependent Claim
247 words
A converter circuit comprising a pair of input terminals adapted to receive a train of input pulses of variable frequency, an input capacitor and a first diode connected in series to said terminals, a storage capacitor connected in circuit so as to be charged up in response to input pulses applied to it through said input capacitor and then through said first diode, a discharge circuit connected to said storage capacitor to allow the charge thereon to decay during the periods between successive input pulses, a second diode coupled to the input capacitor and poled to allow said input capacitor to discharge during said periods between successive input pulses, a transistor connected as an emitter follower with its base connected to the storage capacitor thereby to provide a reference voltage at the emitter which approximates the instantaneous voltage across the storage capacitor, means including a resistor for connecting said emitter to a terminal of the second diode remote from the input capacitor whereby the input capacitor can only discharge to the value of said reference voltage at the emitter of the transistor emitter follower, an RC time constant element with a junction connected to said emitter via a third diode, and an output terminal connected to said RC junction whereby the rise time of an output voltage developed at said output terminal is controlled by said time constant element during each period that said third diode is reverse biased by the emitter voltage of said emitter follower.
Claim 5
Dependent Claim
247 words
A converter circuit comprising a pair of input terminals adapted to receive a train of input pulses of variable frequency, an input capacitor and a first diode connected in series to said terminals, a storage capacitor connected in circuit so as to be charged up in response to input pulses applied to it through said input capacitor and then through said first diode, a discharge circuit connected to said storage capacitor to allow the charge thereon to decay during the periods between successive input pulses, a second diode coupled to the input capacitor and poled to allow said input capacitor to discharge during said periods between successive input pulses, a transistor connected as an emitter follower with its base connected to the storage capacitor thereby to provide a reference voltage at the emitter which approximates the instantaneous voltage across the storage capacitor, means including a resistor for connecting said emitter to a terminal of the second diode remote from the input capacitor whereby the input capacitor can only discharge to the value of said reference voltage at the emitter of the transistor emitter follower, an RC time constant element with a junction connected to said emitter via a third diode, and an output terminal connected to said RC junction whereby the rise time of an output voltage developed at said output terminal is controlled by said time constant element during each period that said third diode is reverse biased by the emitter voltage of said emitter follower.
Claim 6
Dependent Claim
53 words
A converter as claimed in claim 3 wherein said input capacitor, said first diode, and said storage capacitor are connected in a series circuit across said input terminals and the second diode is connected between the junction point of the input capacitor and the first diode and the emitter of the emitter follower.
Claim 7
Dependent Claim
28 words
A converter as claimed in claim 3 wherein said RC time constant element comprises a resistor and capacitor connected in series across a source of DC supply voltage.
Claim 8
Dependent Claim
34 words
A converter as claimed in claim 4 wherein said first and second diodes are poled so that the anode of one diode and the cathode of the other are connected to said junction point.
Claim 9
Dependent Claim
41 words
A converter as claimed in claim 5 wherein the emitter follower transistor is of the NPN type and the third diode has its cathode directly connected to the emitter and its anode connected to the junction of said resistor and capacitor.
References Cited (Backward Citations)
US2403557A
Cited
US2908865A
Cited
US3267289A
Cited
US3196292A
Cited
US3233190A
Cited
US3351864A
Cited
US3336503A
Cited
US3567960A
Cited
US3553488A
Cited
US3548318A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-11-07 | 1976-05-08 | 1976-11-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-11-07 | 1980-05-08 | 1980-11-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-11-07 | 1984-05-08 | 1984-11-07 | $7700.00 | Window Closed / Lapsed |