Patent US3617761A successfully refreshed from Google Patents.
US3196292A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Noise suppressor circuit
Assignee: Tektronix Inc
•
Filing: 1964-02-26
•
Granted: 1965-07-20
•
Expires: 1984-02-26
Abstract
No abstract record available.
Inventors
- 👤 Samuel R Mccutcheon
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:08
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/153
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
359 words
A NOISE SUPPRESSOR CIRCUIT, COMPRISING: A FIRST NPN TYPE GATING TANSISTOR CONNECTED AS A COMMON EMITTER AMPLIFIER; A SECOND PNP TYPE GATING TRFANSISTOR CONNECTED AS A COMMON EMITTER AMPLIFIER WITH THE BASES OF SAID GATING TRANSISTORS CONNECTED TO A COMMON SIGNAL INPUT TERMINAL; A FIRST PNP TYPE AMPLIFIER TRANSISTOR CONNECTED AS AN EMITTER FOLLOWER AMPLIFIER, WITH THE EMITTER OF SAID FIRST AMPLIFIER TRANSISTOR CONNECTED TO THE COLLECTOR OF SAID FIRST GATING TRANSISTOR; A SECOND PNP TYPE AMPLIFIER TRANSISTOR CONNECTED AS A COMMON EMITTER AMPLIFIER, WITH THE COLLECTOR OF SAID SECOND AMPLIFIER TRANSISTOR CONNECTED TO THE COLLECTOR OF SAID SECOND GATING TRANSISTOR AND THE BASES OF SAID AMPLIFIER TRANSISTORS CONNECTED TO A COMMON PULSE INPUT TERMINAL; A FIRST COMMON LOAD RESISTOR CONNECTED TO THE COLLECTOR OF SAID FIRST GATING TRANSISTOR AND TO THE EMITTER OF SAID FIRST AMPLIFIER TRANSISTOR. A SECOND COMMON LOAD RESISTOR CONNECTED TO THE COLLECTOR OF SAID SECOND GATING TRANSISTOR AND TO THE COLLECTOR OF SAID SECOND AMPLIFIER TRANSISTOR; A FIRST COUPLING CAPACITOR HAVING ONE PLATE CONNECTED TO THE EMITTER OF SAID FIRST AMPLIFIER TRANSISTOR; A SECOND COUPLING CAPACITOR HAVING ONE PLATE CONNECTED TO THE COLLECTOR OF SAID SECOND AMPLIFIER TRANSISTOR; A FIRST COUPLING DIODE CONNECTED AT ITS ANODE TO THE OTHER PLATE OF SAID FIRST COUPLING CAPACITOR; A SECOND COUPLING DIODE CONNECTED AT ITS CATHOLE TO THE OTHER PLATE OF SAID SECOND COUPLING CAPACITOR; A FIRST LIMITING DIODE CONNECTED AT ITS CATHOLE TO SAID OTHER PLATE OF SAID FIRST COUPLING CAPACITOR AND AT ITS ANODE TO A LOWER LIMIT D.C. REFERENCE VOLTAGE; A SECOND LIMITING DIODE CONNECTED AT ITS ANODE TO SAID OTHER PLATE OF SAID SECOND COUPLING CAPACITOR AND AT ITS CATHODE TO AN UPPER LIMIT D.C. REFERENCE VOLTAGE; AND A MEMORY CAPACITOR HAVING ONE PLATE CONNECTED IN COMMON WITH THE CATHODE OF SAID FIRST COUPLING DIODE AND THE ANODE OF SAID SECOND COUPLING DIODE AND HAVING ITS OTHER PLATE CONNECTED TO GROUND, SO THAT WHEN A PLURALITY OF STANDARD VOLTAGE PULSES ARE APPLIED TO SAID PULSE INPUT TERMINAL AN INPUT SIGNAL APPLIED TO SAID LIQUID INPUT TERMINAL IS REPRODUCED AS A STAIRSTEP OUTPUT SIGNAL ACROSS SAID TONGUE CAPACITOR WHICH IS SUBSTANTIALLY FREE FROM NOISE.
Claim 2
Dependent Claim
359 words
A NOISE SUPPRESSOR CIRCUIT, COMPRISING: A FIRST NPN TYPE GATING TANSISTOR CONNECTED AS A COMMON EMITTER AMPLIFIER; A SECOND PNP TYPE GATING TRFANSISTOR CONNECTED AS A COMMON EMITTER AMPLIFIER WITH THE BASES OF SAID GATING TRANSISTORS CONNECTED TO A COMMON SIGNAL INPUT TERMINAL; A FIRST PNP TYPE AMPLIFIER TRANSISTOR CONNECTED AS AN EMITTER FOLLOWER AMPLIFIER, WITH THE EMITTER OF SAID FIRST AMPLIFIER TRANSISTOR CONNECTED TO THE COLLECTOR OF SAID FIRST GATING TRANSISTOR; A SECOND PNP TYPE AMPLIFIER TRANSISTOR CONNECTED AS A COMMON EMITTER AMPLIFIER, WITH THE COLLECTOR OF SAID SECOND AMPLIFIER TRANSISTOR CONNECTED TO THE COLLECTOR OF SAID SECOND GATING TRANSISTOR AND THE BASES OF SAID AMPLIFIER TRANSISTORS CONNECTED TO A COMMON PULSE INPUT TERMINAL; A FIRST COMMON LOAD RESISTOR CONNECTED TO THE COLLECTOR OF SAID FIRST GATING TRANSISTOR AND TO THE EMITTER OF SAID FIRST AMPLIFIER TRANSISTOR. A SECOND COMMON LOAD RESISTOR CONNECTED TO THE COLLECTOR OF SAID SECOND GATING TRANSISTOR AND TO THE COLLECTOR OF SAID SECOND AMPLIFIER TRANSISTOR; A FIRST COUPLING CAPACITOR HAVING ONE PLATE CONNECTED TO THE EMITTER OF SAID FIRST AMPLIFIER TRANSISTOR; A SECOND COUPLING CAPACITOR HAVING ONE PLATE CONNECTED TO THE COLLECTOR OF SAID SECOND AMPLIFIER TRANSISTOR; A FIRST COUPLING DIODE CONNECTED AT ITS ANODE TO THE OTHER PLATE OF SAID FIRST COUPLING CAPACITOR; A SECOND COUPLING DIODE CONNECTED AT ITS CATHOLE TO THE OTHER PLATE OF SAID SECOND COUPLING CAPACITOR; A FIRST LIMITING DIODE CONNECTED AT ITS CATHOLE TO SAID OTHER PLATE OF SAID FIRST COUPLING CAPACITOR AND AT ITS ANODE TO A LOWER LIMIT D.C. REFERENCE VOLTAGE; A SECOND LIMITING DIODE CONNECTED AT ITS ANODE TO SAID OTHER PLATE OF SAID SECOND COUPLING CAPACITOR AND AT ITS CATHODE TO AN UPPER LIMIT D.C. REFERENCE VOLTAGE; AND A MEMORY CAPACITOR HAVING ONE PLATE CONNECTED IN COMMON WITH THE CATHODE OF SAID FIRST COUPLING DIODE AND THE ANODE OF SAID SECOND COUPLING DIODE AND HAVING ITS OTHER PLATE CONNECTED TO GROUND, SO THAT WHEN A PLURALITY OF STANDARD VOLTAGE PULSES ARE APPLIED TO SAID PULSE INPUT TERMINAL AN INPUT SIGNAL APPLIED TO SAID LIQUID INPUT TERMINAL IS REPRODUCED AS A STAIRSTEP OUTPUT SIGNAL ACROSS SAID TONGUE CAPACITOR WHICH IS SUBSTANTIALLY FREE FROM NOISE.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1968-07-19 | 1969-01-18 | 1969-07-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1972-07-19 | 1973-01-18 | 1973-07-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1976-07-19 | 1977-01-18 | 1977-07-20 | $7700.00 | Window Closed / Lapsed |