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US3689900A
Expired / Lapsed
US
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Photo-coded diode array for read only memory
Assignee: General Electric Co
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Filing: 1970-08-31
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Granted: 1972-09-05
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Expires: 1990-08-31
Abstract
Abstract A diode read only memory array is disclosed in which the intersecting signal lines of the array are connected by a series circuit comprising a conventional diode and a photodiode, oppositely poled. Information is stored by selectively irradiating the array to produce reverse conduction in selected ones of the photodiodes. The integrated circuit structure used in fabricating the memory array is also disclosed.
Inventors
- 👤 Arthur C M Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 21:23
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/18; G; G11; G11C; G11C17/00; G11C17/06; H10F99/00; Y; Y10; Y10S; Y10S148/00; Y10S148/051; Y10S148/085; Y10S148/135; Y10S257/00; Y10S257/926
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
177 words
A photocoded diode read only memory array comprising: a matrix comprising a plurality of intersecting WORD and DATA lines; a series circuit for electrically interconnecting a single WORD line to a single DATA line at each intersection, each series circuit comprising a diode and a photoconductive diode series connected and oppositely poled and formed as a semiconductor substrate of a first conductivity type; a doped region of a second conductivity type diffused into said substrate; said substrate having a hollowed-out region opposite said doped region, said hollowed-out region being spaced from said doped region by a predetermined distance; and a surface-barrier metallization layer deposited atop said doped region, whereby said substrate and said doped region form said photoconductive diode and said doped region and said surface barrier layer form said diode; light source means; and mask means having opaque or translucent areas corresponding to the pattern of said photoconductive diodes in said matrix and interposed between said light source and said matrix, wherein the information to be stored determines whether a given area is opaque or translucent.
Claim 2
Dependent Claim
177 words
A photocoded diode read only memory array comprising: a matrix comprising a plurality of intersecting WORD and DATA lines; a series circuit for electrically interconnecting a single WORD line to a single DATA line at each intersection, each series circuit comprising a diode and a photoconductive diode series connected and oppositely poled and formed as a semiconductor substrate of a first conductivity type; a doped region of a second conductivity type diffused into said substrate; said substrate having a hollowed-out region opposite said doped region, said hollowed-out region being spaced from said doped region by a predetermined distance; and a surface-barrier metallization layer deposited atop said doped region, whereby said substrate and said doped region form said photoconductive diode and said doped region and said surface barrier layer form said diode; light source means; and mask means having opaque or translucent areas corresponding to the pattern of said photoconductive diodes in said matrix and interposed between said light source and said matrix, wherein the information to be stored determines whether a given area is opaque or translucent.
Claim 3
Dependent Claim
17 words
An array as set forth in claim 1 wherein said predetermined distance is approximately one depletion width.
Claim 4
Dependent Claim
130 words
An improved read only diode memory array containing a plurality of diodes located one each at intersections of WORD and DATA lines of said array for interconnecting a WORD and a DATA line, wherein each of said diodes comprising a surface barrier metallization area deposited on a substrate of semiconductive material of a first conductivity type, the improvement comprising: a region of second conductivity type diffused into said substrate underneath each surface barrier metallization area, and said substrate having a hollowed-out portion on the opposite side of said substrate from said region and spaced from said region by a predetermined distance, whereby said region forms the common electrode of a pair of series connected, oppositely poled diodes and said hollowed-out portion enables one of said diodes to exhibit photoconductive characteristics.
Claim 5
Dependent Claim
130 words
An improved read only diode memory array containing a plurality of diodes located one each at intersections of WORD and DATA lines of said array for interconnecting a WORD and a DATA line, wherein each of said diodes comprising a surface barrier metallization area deposited on a substrate of semiconductive material of a first conductivity type, the improvement comprising: a region of second conductivity type diffused into said substrate underneath each surface barrier metallization area, and said substrate having a hollowed-out portion on the opposite side of said substrate from said region and spaced from said region by a predetermined distance, whereby said region forms the common electrode of a pair of series connected, oppositely poled diodes and said hollowed-out portion enables one of said diodes to exhibit photoconductive characteristics.
Claim 6
Dependent Claim
23 words
An improved memory array as set forth in claim 3, wherein said predetermined distance is approximately one depletion width in said substrate material.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-09-05 | 1976-03-06 | 1976-09-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-09-05 | 1980-03-06 | 1980-09-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-09-05 | 1984-03-06 | 1984-09-05 | $7700.00 | Window Closed / Lapsed |