Semiconductor memory

Claim 2

A semiconductor memory comprising: a bistable memory cell having two storage elements with two input/output terminals, and having flip-flop characteristics; a power supply connected to said memory cell for maintaining the state of said bistable memory cell while said memory cell is in the non-selected state; a coupling circuit comprising a pair of transistors, the emitters of which are connected with each other and the bases of which are connected with the input/output terminals of said memory cell, respectively; means for connecting a pair of digit lines with the collectors of said pair of transistors, respectively; a normally open switch connected with an address line and operatively switched on and off in response to variations in an address signal applied thereto through said address line, whereby said memory cell becomes selected when said switch is in the on-state; and a constant current source connected via said switch with said commonly connected emitters of said pair of transistors.

Claim 3

A semiconductor memory according to claim 1 wherein said bistable memory cell comprises a pair of memory transistors, the emitters of which are connected in common with said power supply, the base of each one of said memory transistors being connected to the collector of the other, a coupling resistor inserted between the collectors of said pair of memory transistors, and a pair of resistors connected with the collectors of said memory transistors for supplying an operation voltage therethrough to said memory transistors, said input/output terminals being connected with said collectors of said memory transistors, respectively.

Claim 4

A semiconductor memory according to claim 1, wherein said connecting means comprises a pair of diodes inserted between said digit lines and the collectors of said transistors of the coupling circuit in a direction to prevent a forward current from flowing through a base-collector junction of said transistors of the coupling circuit.

Claim 5

A semiconductor memory according to claim 1, wherein said switch is a current switching type semiconductor switch comprising a pair of transistors, the emitters of which are connected in common with said constant current source, the collector and base of one of which are connected with said common emitter of said transistors of said coupling circuit and said address line, respectively, and the base of the other of which is supplied with a reference voltage to actuate said switch depending on whether said address signal is higher than said reference voltage or not.

Claim 6

A semiconductor memory comprising: a bistable flip-flop having first and second storage elements with first and second input/output terminals connected thereto; means for coupling the input/output terminals to a pair of digit lines comprising a coupling circuit having a pair of transistors, the emitters of which are connected together and the bases of which are connected to the input/output terminals of said bistable flip-flop respectively; means for connecting said pair of digit lines with the collectors of said pair of transistors of said coupling circuit, respectively; means for maintaining one of the bistable states of said flip-flop during the period of time when said input/output terminals are decoupled from said digit lines; means, responsive to an address signal on an address line connected thereto, and being connected to said coupling circuit, for effecting the coupling of said digit lines with said input/output terminals of said flip-flop, said coupling effecting means comprising a normally-open switch connected between said address line and said coupling circuit; and a constant current source connected via said normally-open switch, with the connected together emitters of said pair of transistors.

Claim 7

A semiconductor memory comprising: a bistable flip-flop having first and second storage elements with first and second input/output terminals connected thereto; means for coupling the input/output terminals to a pair of digit lines comprising a coupling circuit having a pair of transistors, the emitters of which are connected together and the bases of which are connected to the input/output terminals of said bistable flip-flop respectively; means for connecting said pair of digit lines with the collectors of said pair of transistors of said coupling circuit, respectively; means for maintaining one of the bistable states of said flip-flop during the period of time when said input/output terminals are decoupled from said digit lines; means, responsive to an address signal on an address line connected thereto, and being connected to said coupling circuit, for effecting the coupling of said digit lines with said input/output terminals of said flip-flop, said coupling effecting means comprising a normally-open switch connected between said address line and said coupling circuit; and a constant current source connected via said normally-open switch, with the connected together emitters of said pair of transistors.

Claim 8

A semiconductor memory according to claim 5, wherein said flip-flop comprises a pair of memory transistors, the emitters of which are connected in common with said maintaining means, the base of each one of said memory transistors being connected to the collector of the other, a coupling resistor inserted between the collectors of said pair of memory transistors, and a pair of resistors connected with the collectors of said memory transistors for supplying an operation voltage therethrough to said memory transistors, said input/output terminals being connected with said collectors of said memory transistors, respectively, and wherein said maintaining means comprises a power supply.

Claim 9

A semiconductor memory according to claim 5, wherein said connecting means comprises a pair of diodes inserted between said digit lines and the collectors of said transistors of the coupling circuit in a direction to prevent a forward current from flowing through a base-collector junction of said transistors of the coupling circuit.

Claim 10

A semiconductor memory according to claim 7, wherein said switch is a current switching type semiconductor switch comprising a pair of transistors, the emitters of which are connected in common with said constant current source, the collector and base of one of which are connected with said common emitter of said transistors of said coupling circuit and said address line, respectively, and the base of the other of which is supplied with a reference voltage to actuate said switch depending on whether said address signal is higher than said reference voltage or not.

Claim 11

A semiconductor memory according to claim 5, wherein said switch is a current switching type semiconductor switch comprising a pair of transistors, the emitters of which are connected in common with said constant current source, the collector and base of one of which are connected with said common emitter of said transistors, of said coupling circuit and said address line, respectively, and the base of the other of which is supplied with a reference voltage to actuate said switch depending on whether said address signal is higher than said reference voltage or not.