Memory addressing register comprising bistable circuit with current steering means having disabling means

Claim 1

IN A REGISTER FOR STORING BINARY ADDRESS SIGNALS INDENTIFYING LOCATIONS IN A MEMORY STORAGE DEVICE AND FOR APPLYING SAID SIGNALS TO A DECODING CIRCUIT CONNECTED TO SAID MEMORY STORAGE DEVICE, A BISTABLE CIRCUIT HAVING FIRST AND SECOND INPUT TERMINALS AND FIRST AND SECOND OUTPUT TERMINALS AND MEANS CONNECTING EACH OF SAID OUTPUT TERMINALS TO A DIFFERENT ONE OF SAID INPUT TERMINALS; A CURRENT STEERING CIRCUIT HAVING AN INPUT TERMINAL AND FIRST AND SECOND OUTPUT TERMINALS; MEANS APPLYING SAID ADDRESS SIGNALS TO SAID CURRENT STEERING CIRCUIT IMPUT TERMINAL; SAID CURRENT STEERING CIRCUIT BEING RESPONSIVE TO THE TWO POSSIBLE VALUES OF SAID APPLIED BINARY ADDRESS SIGNALS FOR RESPECTIVELY PROVIDING OUTPUT SIGNALS ON EITHER ITS FIRST OR SECOND OUTPUT TERMINALS; AND MEANS FOR CONNECTING SAID FIRST OUTPUT TERMINALS TOGETHER AND TO SAID DECODING CIRCUIT AND SAID SECOND OUTPUT TERMINALS TOGETHER AND TO SAID DECODING CIRCUIT; AND MEANS FOR SELECTIVELY DISABLING SAID CURRENT STEERING CIRCUIT.