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US3668430A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed logic circuit with low effective miller capacitance

Assignee: Signetics Corp
•
Filing: 1971-07-12
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Granted: 1972-06-06
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Expires: 1991-07-12
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Abstract

Abstract A high speed logic circuit includes a differential amplifier driving a shunt feedback output amplifier having an input which acts as an ac ground. The effective Miller capacitance of the differential amplifier is therefore minimized.

Inventors

  • 👤 David T Kan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 12:47
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/01; H03K19/013; H03K19/0175; H03K19/018; H03K19/01806; H03K19/01812

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 156 words
A logic circuit having an output terminal switchable between two levels in response to a bi-level input signal on an input terminal comprising: a differential amplifier switchable between two states having a reference voltage input and also being coupled to said input terminal of said logic circuit said amplifier being responsive to a level change in said input signal for switching from one state to another on at least one output terminal; a shunt feedback output amplifier including shunt feedback means for maintaining an active element of said amplifier continuously on an input terminal of said active element being coupled to said output terminal of said differential amplifier and forming a virtual ac ground, said shunt feedback means also being coupled to said output terminal of said differential amplifier, a change of state of such terminal causing a change of current through said feedback means for providing said two levels on said logic circuit output terminal.
Claim 2
Dependent Claim 156 words
A logic circuit having an output terminal switchable between two levels in response to a bi-level input signal on an input terminal comprising: a differential amplifier switchable between two states having a reference voltage input and also being coupled to said input terminal of said logic circuit said amplifier being responsive to a level change in said input signal for switching from one state to another on at least one output terminal; a shunt feedback output amplifier including shunt feedback means for maintaining an active element of said amplifier continuously on an input terminal of said active element being coupled to said output terminal of said differential amplifier and forming a virtual ac ground, said shunt feedback means also being coupled to said output terminal of said differential amplifier, a change of state of such terminal causing a change of current through said feedback means for providing said two levels on said logic circuit output terminal.
Claim 3
Dependent Claim 101 words
A circuit as in claim 1 where said differential amplifier includes two emitter coupled transistors the collector of one being said differential amplifier output terminal said feedback output amplifier including a transistor and a feedback resistor coupled between its collector and base said base being coupled to said collector of said differential amplifier transistor, conduction of such transistor causing an increase of current through such resistor to switch said output level, said resistor maintaining said transistor of said amplifier continuously conductive whereby the voltage level of the base input of such transistor is maintained constant to form said virtual ac ground.
Claim 4
Dependent Claim 18 words
A circuit as in claim 1 together with diode biased current source means for biasing said differential amplifier.

References Cited (Backward Citations)

US3364434A Cited
US3573489A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-06-06 1975-12-06 1976-06-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-06-06 1979-12-06 1980-06-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-06-06 1983-12-06 1984-06-06 $7700.00 Window Closed / Lapsed

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