US3663884A
Expired / Lapsed
US
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Frequency difference detector
Assignee: Westinghouse Electric Corp
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Filing: 1969-10-24
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Granted: 1972-05-16
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Expires: 1989-10-24
Abstract
Abstract A system for detecting a frequency difference between a known reference frequency and an unknown frequency wherein both frequencies are delayed and respectively applied to a bistable element whose output state is utilized to control respectively a pair of AND logic elements which also receive signals as inputs respectively in response to the undelayed frequencies, an output from either of the AND elements being indicative that a frequency difference exists and the direction of the difference.
Inventors
- 👤 Tamas I Pattantyus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 04:55
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/26; G; G01; G01R; G01R23/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
212 words
In a system for detecting a frequency difference and direction of difference between a reference signal having a known frequency and an unknown signal having an unknown frequency, the combination of: monostable means for providing first and second monostable outputs in response to said reference and unknown signals respectively; delay means for responding to the presence of each of said reference and unknown signals by similarly delaying each of said reference and unknown signals respectively; a two condition bistable means having first and second inputs and first and second outputs, the delayed reference and unknown signals being applied input signals to said first and second inputs respectively, the presence of an input signal at said first input assuring a first output condition at said first output and the presence of an input signal at said second input assuring a second output condition at said second output; and logic means responsive to said first monostable output and said first output condition of said bistable means to provide a first detection output when said known and unknown frequencies have a first predetermined relationship therebetween and responsive to said second monostable output and said second output condition to provide a second detection output when said known and unknown frequencies have a second predetermined relationship therebetween.
Claim 2
Dependent Claim
212 words
In a system for detecting a frequency difference and direction of difference between a reference signal having a known frequency and an unknown signal having an unknown frequency, the combination of: monostable means for providing first and second monostable outputs in response to said reference and unknown signals respectively; delay means for responding to the presence of each of said reference and unknown signals by similarly delaying each of said reference and unknown signals respectively; a two condition bistable means having first and second inputs and first and second outputs, the delayed reference and unknown signals being applied input signals to said first and second inputs respectively, the presence of an input signal at said first input assuring a first output condition at said first output and the presence of an input signal at said second input assuring a second output condition at said second output; and logic means responsive to said first monostable output and said first output condition of said bistable means to provide a first detection output when said known and unknown frequencies have a first predetermined relationship therebetween and responsive to said second monostable output and said second output condition to provide a second detection output when said known and unknown frequencies have a second predetermined relationship therebetween.
Claim 3
Dependent Claim
35 words
The combination of claim 1 wherein: said first and second monostable outputs have predetermined time durations, the period of delay of said reference and unknown signals by said delaying means exceeding said predetermined time durations.
Claim 4
Dependent Claim
65 words
The combination of claim 2 wherein: said bistable means comprises a flip-flop element having a set and a reset input, the delayed reference signal being applied to said set input and the delayed unknown signal being applied to the reset input, said fLip-flop element being non-responsive to inputs applied to either the set or reset input until a reset or set input respectively is received.
Claim 5
Dependent Claim
65 words
The combination of claim 3 wherein: said logic means includes a first AND circuit for receiving said first monostable output and said first output condition defining that said first predetermined relationship is that said known frequency exceeds said unknown frequency, and a second AND circuit for receiving said second monostable output and said second output condition defining that said unknown frequency exceeds said known frequency.
Claim 6
Dependent Claim
51 words
The combination of claim 4 wherein: said monostable means includes first and second monostable elements for providing respectively said first and second monostable outputs having substantially equal time durations, said delay means includes first and second delay elements for delaying respectively said reference and unknown signals by said predetermined time delay.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-05-16 | 1975-11-15 | 1976-05-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-05-16 | 1979-11-15 | 1980-05-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-05-16 | 1983-11-15 | 1984-05-16 | $7700.00 | Window Closed / Lapsed |