Pulse resolution circuit with gated delay means and flip-flop providing selective separation between random inputs

Claim 1

A PULSE RESOLUTION CIRCUIT FOR PROVIDING AT LEAST A PREDETERMINED TIME SEPARATION BETWEEN RANDOMLY OCCURRING FIRST AND SECOND SIGNALS COMPRISING MEANS FOR APPLYING SAID FIRST SIGNAL TO A FIRST PATH HAVING A FIRST PREDETERMINED DELAY INTERVAL, MEANS FOR DIRECTLY APPLYING SAID SECOND SIGNAL BOTH TO A SECOND PATH AND TO A THIRD PATH, SAID SECOND PATH HAVING A DELAY APPRECIABLY GREATER THAN AND SAID THIRD PATH HAVING A DELAY APPRECIABLY LESS THAN THAT OF SAID FIRST PATH, FIRST CONTROL MEANS RESPONSIVE TO THE APPLICATION OF SAID FIRST SIGNAL TO SAID FIRST PATH AND TO THE APPLICATION OF SAID SECOND SIGNAL TO SAID SECOND AND THIRD PATHS FOR MAINTAINING SAID THIRD PATH BLOCKED AND FOR SIMULTANEOUSLY UNBLOCKING SAID SECOND PATH BOTH DURING THE PASSAGE OF SAID FIRST SIGNAL THROUGH SAID FIRST PATH FOR SAID FIRST DELAY INTERVAL AND FOR AN EQUAL INTERVAL THEREAFTER, AND SECOND CONTROL MEANS RESPONSIVE TO SAID APPLICATION OF SAID FIRST SIGNAL AND TO SAID APPLICATION OF SAID SECOND SIGNAL FOR MAINTAINING SAID SECOND PATH BLOCKED AND FOR SIMULTANEOUSLY UNBLOCKING SAID THIRD PATH AFTER THE EXPIRATION OF SAID EQUAL INTERVAL.