Passivated wire-bonded semiconductor device

Claim 2

The insulated-gate field effect transistor defined in claim 1 wherein the dielectric coating is about 0.05-0.2 micron in thickness and the ductile metal layers are about 0.2-0.5 micron in thickness, and the connector wires are less than about 3 mils in diameter.

Claim 3

The insulated-gate field effect transistor defined in claim 3 wherein the dielectric coating is of tantalum oxide, the metal layers are of aluminum and the connector wires are of a metal selected from the group consisting of aluminum and gold.

Claim 4

The insulated-gate field effect transistor as defined in claim 3 wherein the dielectric coating is an insulating, relatively inert, brittle material having a Moh hardness of at least 7.

Claim 5

In an insulated-gate field effect transistor having spaced-apart source and drain regions, a gate region therebetween, the improvement which comprises each of said source and drain regions having a first layer of ductile metal thereon, a layer of dielectric material at least 0.05 micron thick and less than about one-half as thick as said first metal layer, a second metal layer on said dielectric layer, a connector wire portion compression bonded to said second metal layer and said first and second metal layers at least touching one another through a fracture in said dielectric coating under the bonded portion of said connector wire to provide a low-resistance electrical connection between said connector wire and said region.

Claim 6

An insulated-gate field effect transistor comprising a semiconductive body having a surface, source and drain regions on said surface, a first layer of ductile metal on each of said source and drain regions, a coating of a dielectric material on said body covering said surface and the metal layer on each of said regions, said dielectric coating being less than one-half as thick as said metal layer, a second layer of ductile metal on said dielectric coating over each of said source and drain regions and over a gate region therebetween, a separate connector wire compression bonded to the second metal layer over each of said source, drain and gate regions, said first and second metal layers touching one another through a fracture in said dielectric coating over each of said source and drain regions to provide a low-resistance electrical connection between each region and its connector wire, and said dielectric coating being otherwise continuous between said source and drain regions.